EDJ1104BASE Datasheet, PDF (104/148 Pages) Elpida Memory – 1G bits DDR3 SDRAM

EDJ1104BASE, EDJ1108BASE, EDJ1116BASE
CK
/CK
Command*³
Address*⁴
DQS, /DQS
T0
READ
Bank
Col n
NOP
tCCD
T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14
READ
Bank
Col b
tRPRE
NOP
tRPST
tRPRE
tRPST
DQ*²
RL = 5
Dout Dout Dout Dout
n n+1 n+2 n+3
RL = 5
Dout Dout Dout Dout
b b+1 b+2 b+3
Notes: 1. BC4, RL = 5 (CL = 5, AL = 0).
VIH or VIL
2. Dout n (or b) = data-out from column n (or column b).
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BC4 setting activated by MR0 bit [A1, A0] = [1, 0] or MR0 bit [A1, A0] = [0, 1] and A12 = 0 during READ command at T0 and T4.
READ (BC4) to READ (BC4)
CK
/CK
Command*³
Address*⁴
DQS, /DQS
T0
T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15
READ
NOP
WRIT
READ to WRIT command delay = RL + tCCD + 2tCK − WL
Bank
Col n
tRPRE
Bank
Col b
NOP
tBL = 4 clocks
tWR
tWTR
tRPST
tWPRE
tWPST
DQ*²
RL = 5
Dout Dout Dout Dout Dout Dout Dout Dout
n n+1 n+2 n+3 n+4 n+5 n+6 n+7
WL = 5
Din Din Din Din Din Din Din Din
b b+1 b+2 b+3 b+4 b+5 b+6 b+7
VIH or VIL
Notes: 1. BL8, RL = 5 (CL = 5, AL = 0), WL = 5 (CWL = 5, AL = 0).
2. Dout n = data-out from column n, Din b= data-in from column b.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by MR0 bit [A1, A0] = [0, 0] or MR0 bit [A1, A0] = [0, 1] and A12 = 1 during READ command at T0 and WRIT command T6.
READ (BL8) to WRITE (BL8)
Data Sheet E1128E60 (Ver. 6.0)
104