GD25Q32 Datasheet, PDF (37/50 Pages) ELM Electronics – 3.3V Uniform Sector Dual and Quad Serial Flash

GD25Q32CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
http://www.elm-tech.com
Figure 36. Program Security Registers command Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31 32 33 34 35 36 37 38 39
SI
CS#
SCLK
Command
42H
24-bit address
Data Byte 1
23 22 21
321076543210
MSB
MSB
40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55
Data Byte 2
Data Byte 3
Data Byte 256
SI
7654321076543210
76543210
MSB
MSB
MSB
7.32. Read Security Registers (48H)
The Read Security Registers command is similar to Fast Read command. The command is followed by a
3-byte address (A23-A0) and a dummy byte, each bit being latched-in during the rising edge of SCLK. Then
the memory content, at that address, is shifted out on SO, each bit being shifted out, at a Max frequency fC,
during the falling edge of SCLK. The first byte addressed can be at any location. The address is automatically
incremented to the next higher address after each byte of data is shifted out. Once the A9-A0 address reaches the
last byte of the register (Byte 3FFH), it will reset to 000H, the command is completed by driving CS# high.
Address
Security Register #1
Security Register #2
Security Register #3
A23-A16
00H
00H
00H
A15-A12
0001
0010
0011
A11-A10
00
00
00
A9-A0
Byte Address
Byte Address
Byte Address
Figure 37. Read Security Registers command Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31
SI
SO
CS#
SCLK
SI
SO
Command
48H
High-Z
24-bit address
23 22 21
3210
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Dummy Byte
76543210
Data Out1
Data Out2
76543210765
MSB
MSB
50 - 37
Rev.1.0