|
GD25Q21 Datasheet, PDF (23/49 Pages) ELM Electronics – Uniform Sector Dual and Quad Serial Flash | |||
|
◁ |
GD25Q21BxIGx Uniform Sector Dual and Quad Serial Flash
http://www.elm-tech.com
Quad I/O Fast Read with â8/16/32/64-Byte Wrap Aroundâ in Standard SPI mode
The Quad I/O Fast Read command can be used to access a specific portion within a page by issuing âSet Burst
with Wrapâ (77H) commands prior to EBH. The âSet Burst with Wrapâ (77H) command can either enable or
disable the âWrap Aroundâ feature for the following EBH commands. When âWrap Aroundâ is enabled, the
data being accessed can be limited to either an 8/16/32/64-byte section of a 256-byte page. The output data
starts at the initial address specified in the command, once it reaches the ending boundary of the 8/16/32/64-byte
section, the output will wrap around the beginning boundary automatically until CS# is pulled high to terminate
the command.
The Burst with Wrap feature allows applications that use cache to quickly fetch a critical address and then fill
the cache afterwards within a fixed length (8/16/32/64-byte) of data without issuing multiple read commands.
The âSet Burst with Wrapâ command allows three âWrap Bitsâ W6-W4 to be set. The W4 bit is used to enable
or disable the âWrap Aroundâ operation while W6-W5 is used to specify the length of the wrap around section
within a page.
7.13. Quad I/O Word Fast Read (E7H)
The Quad I/O Word Fast Read command is similar to the Quad I/O Fast Read command except that the lowest
address bit (A0) must equal 0 and only 2-dummy clock. The command sequence is shown in followed Figure16.
The first byte addressed can be at any location. The address is automatically incremented to the next higher
address after each byte of data is shifted out. The Quad Enable bit (QE) of Status Register (S9) must be set
to enable for the Quad I/O Word Fast read command. To ensure optimum performance the High Performance
Mode (HPM) command (A3h) must be executed once, prior to the Quad I/O Word Fast Read command.
Quad I/O Word Fast Read with âContinuous Read Modeâ
The Quad I/O Word Fast Read command can further reduce command overhead through setting the âContinuous
Read Modeâ bits (M7-0) after the input 3-byte address (A23-A0). If the âContinuous Read Modeâ bits (M7-0)
=AXH, then the next Quad I/O Word Fast Read command (after CS# is raised and then lowered) does not
require the E7H command code. The command sequence is shown in followed Figure17. If the âContinuous
Read Modeâ bits (M7-0) are any value other than AXH, the next command requires the first E7H command
code, thus returning to normal operation. A âContinuous Read Modeâ Reset command can be used to reset (M7-0)
before issuing normal command.
Figure 16. Quad I/O Word Fast Read Sequence Diagram (M7-0 = 0XH or not AXH)
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
SI(IO0)
Command
E7H
40404040
404040 4
SO(IO1)
51515151
515151 5
WP#(IO2)
62626262
626262 6
HOLD#(IO3)
73737373
737373 7
A23-16 A15-8 A7-0 M7-0 Dummy Byte1 Byte2 Byte3
49 - 23
Rev.1.1
|
▷ |