GD25Q21 Datasheet, PDF (19/49 Pages) ELM Electronics – Uniform Sector Dual and Quad Serial Flash

GD25Q21BxIGx Uniform Sector Dual and Quad Serial Flash
7.9. Dual Output Fast Read (3BH)
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The Dual Output Fast Read command is followed by 3-byte address (A23-A0) and a dummy byte, each bit
being latched in during the rising edge of SCLK, then the memory contents are shifted out 2-bit per clock cycle
from SI and SO. The command sequence is shown in followed Figure10. The first byte addressed can be at any
location. The address is automatically incremented to the next higher address after each byte of data is shifted
out.
Figure 10. Dual Output Fast Read Sequence Diagram
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