GD25D05B Datasheet, PDF (15/28 Pages) ELM Electronics – 512K-bit Serial Flash

GD25D05BxIGx Uniform sector dual and quad serial flash
http://www.elm-tech.com
Figure 9. Fast Page Program Sequence Diagram
7.10. Sector Erase (SE) (20H)
The Sector Erase (SE) command is for erasing the all data of the specific sector. A Write Enable (WREN)
command must previously have been executed to set the Write Enable Latch (WEL) bit. The Sector Erase (SE)
command is entered by driving CS# low, followed by the command code, and 3-address byte on SI. Any address
inside the sector is a valid address for the Sector Erase (SE) command. CS# must be driven low for the entire
duration of the sequence.
The Sector Erase command sequence: CS# goes low → sending Sector Erase command → 3-byte address on
SI → CS# goes high. The command sequence is shown in Figure10. CS# must be driven high after the eighth
bit of the last address byte has been latched in; otherwise the Sector Erase (SE) command is not executed. As
soon as CS# is driven high, the self-timed Sector Erase cycle (whose duration is tSE) is initiated. While the
Sector Erase cycle is in progress, the Status Register is accessed to check the value of the Write in Progress (WIP)
bit. The Write in Progress (WIP) bit is 1 during the self-timed Sector Erase cycle, and becomes 0 when it is
completed. At some unspecified time before the cycle is completed, the Write Enable Latch (WEL) bit is reset.
A Sector Erase (SE) command applied to a sector which is protected by the Block Protect (BP2, BP1, BP0) bit (see
Table1) is not executed.
Figure 10. Sector Erase Sequence Diagram
CS#
SCLK
0123456789
29 30 31
SI
Command
24 Bits Address
20H
23 22
210
MSB
28 - 15
Rev.1.0