MA5114 Datasheet, PDF (6/12 Pages) Dynex Semiconductor – Radiation hard 1024x4 Bit Static RAM

MA5114
TAVAVW
ADDRESS
TAVWL
TAVWH
TWLWH (2)
TWHAV (3)
WE
DATA OUT
HIGH
IMPEDANCE
(4)
TELWL
(7)
TWLQZ
DATA IN
TAXQX
TWLQH
(5)
(6)
TDVWH
DATA VALID
TWHDX
TELWH
CS
1. WE must be high during all address transitions.
2. A write occurs during the overlap (T_WLWH) of a low CS and a low WE.
3. T_WHAV is measured from either CS or WE going high, whichever is the earlier, to the end of the write cycle.
4. If the CS low transition occurs simultaneously with, or after, the WE low transition, the output remains in
the high impedance state.
5. DATA OUT is in the active state, so DATA IN must not be in opposing state.
6. DATA OUT is the write data of the current cycle, if selected.
7. DATA OUT is the read data of the next address, if selected.
8. T_ELWL must be met to prevent memory corruption.
Figure 12: Write Cycle
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