MA28155 Datasheet, PDF (3/20 Pages) Dynex Semiconductor – Radiation Hard Programmable Peripheral Interface

RD/WN, DSN
A₀ - A₁, CSN
C
A
A
A
Figure 2: Basic Mode Definitions and Bus Interface
Mode Definition Format (D₇= 1)
MA28155
Single Bit Set/Reset Feature
Any of the eight bits of Port C can be Set or Reset using a
single output instruction. This feature reduces software
requirements in control-based applications.
When Port C is being used as Status/Control for Port A or
B, these bits can be set or reset by using the Bit Set/Reset
operation just as if they were data output ports.
Interrupt Control Functions
When the MA28155 is programmed to operate in Mode 1
or 2, control signals are provided that can be used as interrupt
request inputs to the CPU (figure 4). The interrupt request
signals, generated from Port C, can be inhibited or enabled by
setting or resetting the associated INTE register bit, using the
Bit Set/Reset function of Port C.
This function allows the programmer to disallow or allow a
specific l/O device to interrupt the CPU, without affecting any
other device in the interrupt structure.
INTE register bit definitions:
(BIT-SET): INTE is SET -Interrupt enable
(BIT-RESET): INTE is RESET -Interrupt disable
Note: All mask register bits are automatically reset during
mode selection and device reset.
Bit Set/Reset Format (D₇ = 0)
BIT No.
S
E
L
B₀
B₁
B₂
Figure 4: Bit Set/Reset Format (D₇ = 0)
Figure 3: Mode Definition Format (D₇ = 1)
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