MA31751 Datasheet, PDF (15/17 Pages) Dynex Semiconductor – Memory Management & Block Protection Unit

8.3 PGA PINOUT AND DIMENSIONED DRAWING
MA31751
Pin A1
Index
TOP
VIEW
.050
+/- .010
.180 +/-
.018
.010
+/-
.10
0
.180
+/-.010
1
2
BOTTOM
VIEW
3
4
1.060
sq
+/- .020
5
6
7
8
9
10
A B C D E F GH J K
.100
max
.045 +/-
.005
P in Function P in
A1
PS3
C1
A2
A2
C2
A3
A4
C3
A4
A5
C8
A5
A7
C9
A6
A8
C10
A7
A10
D1
A8
A12
D2
A9
A13
D9
A10
A15
D10
B1
PS1
E1
B2
A0
E2
B3
A1
E9
B4
A3
E10
B5
A6
F1
B6
A9
F2
B7
A11
F9
B8
A14
F10
B9 HITMISSN G1
B10 RDWN
G2
Function
PS0
PS2
MION
GND
ASIN
D0
AS2
AS3
OIN
D1
AS0
AS1
D2
D3
EA0
EA1
D5
D4
EA2
EA4
P in
Function
P in
G9
D7
K3
G10
D6
K4
H1
EA3
K5
H2
EA6
K6
H3
EA8
K7
H8
D12
K8
H9
D10
K9
H10
D8
K10
J1
EA5
J2
EA7
J3
EA10
J4
GLPE
J5
DSN
J6 BPUVALIDN
J7
D16
J8
D14
J9
D13
J10
D9
K1
EA9
K2
EAS
Function
VDD
DMAKN
CSN
RESETN
PRPEN
MPROEN
D15
D11
Figure 21: PGA Pinout and Dimensioned Drawing
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