DS1086 Datasheet, PDF (9/14 Pages) Dallas Semiconductor – DS1086 Spread-Spectrum EconOscillator

DS1086 Spread-Spectrum EconOscillator
V_CC
EEPROM CONTROL
SDA
2-WIRE
REGISTERS
SCL
INTERFACE
DAC
OFFSET
ADDR
RANGE
PRESCALER
DS1086
DAC
FREQUENCY
CONTROL VOLTAGE
PDN
OE
SPRD
GND
DITHER
CONTROL
VOLTAGE-CONTROLLED
OSCILLATOR
MASTER
OSCILLATOR
OUTPUT
PRESCALER
BY 1, 2, 4...256
OUT
TRIANGLE WAVE
GENERATOR _{DITHER SIGNAL}
Figure 3. DS1086 Block Diagram
The output frequency is determined by the following
equation:
(MIN FREQUENCY OF SELECTED OFFSET RANGE)
f_{OUTPUT =}
+ (DAC VALUE × 10kHz STEP SIZE)
PRESCALER
(1)
where: min frequency of selected OFFSET range is the
lowest frequency (shown in Table 2 for the correspond-
ing offset).
DAC value is the value of the DAC register (0 to 1023).
Prescaler is the value of 2^x where x = 0 to 8.
See the Example Frequency Calculations section for a
more in-depth look at using the registers.
________________Register Definitions
The DS1086 registers are used to determine the output
frequency and dither amount. A summary of the regis-
ters is shown in Table 1. Using the default register set-
tings below, the default output frequency is 97.1MHz.
See the Example Frequency Calculations section for an
example on how to determine the register settings for a
desired output frequency.
PRESCALER Register
The PRESCALER register controls the prescaler (bits P3
to P0) and dither (bit J0). The prescaler divides the mas-
ter oscillator frequency by 2^x where x can be from 0 to 8.
Any prescaler value entered that is greater than 8
decodes as 8. The dither applied to the output is con-
trolled with bit J0. When J0 is high, 2% peak dither is
selected. When J0 is low, 4% peak dither is selected.
DAC HIGH/DAC LOW Register
The 2-byte DAC register sets the frequency of the master
oscillator to a particular value within the current offset
range. Each step of the DAC changes the master oscilla-
tor frequency by 10kHz. The first byte is the MSB (DAC
HIGH) and the second byte is the LSB (DAC LOW).
OFFSET Register
The OFFSET register determines the range of frequencies
that can be obtained for a given DAC setting. The factory
default offset is copied into the RANGE register so the
user can access the default offset after making changes
to the OFFSET register. See Table 2 for OFFSET ranges.
Correct operation of the device is not guaranteed out-
side the range 66MHz to 133MHz.
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