DS1086 Datasheet, PDF (11/14 Pages) Dallas Semiconductor – DS1086 Spread-Spectrum EconOscillator

DS1086 Spread-Spectrum EconOscillator
must be read from the RANGE register (last five bits). In
this example, 12h (18 decimal) was read from the
RANGE register. OS - 2 for this case is 10h (16 deci-
mal). This is the value that is written to the OFFSET reg-
ister.
Finally, the two-byte DAC value needs to be deter-
mined. Since OS - 2 only sets the range of frequencies,
the DAC selects one frequency within that range as
shown in Equation 3.
fMASTER OSCILLATOR = (MIN FREQUENCY OF SELECTED OFFSET
RANGE) + (DAC value x 10kHz)
Valid values of DAC are 0 to 1023 (decimal) and 10kHz
is the step size. Equation 4 is derived from rearranging
Equation 3 and solving for DAC.
(f_{MASTER OSCILLATOR} −
MIN FREQUENCY OF SELECTED
DAC VALUE =
OFFSET RANGE)
10kHz STEP SIZE
DAC VALUE = ^{(88.4736MHz − 81.92MHz)}
(4)
10kHz STEP SIZE
= 655.36 ≈ 655 (decimal)
Since the two-byte DAC register is left justified, 655 is
converted to hex (028Fh) and bit-wise shifted left six
places. The value to be programmed into the DAC reg-
ister is A3C0h.
In summary, the DS1086 is programmed as follows:
PRESCALER = 03h (4% peak dither) or 13h (2% peak
dither)
OFFSET = OS - 2 or 10h (if range was read as 12h)
DAC = A3C0h
Notice that the DAC value was rounded. Unfortunately,
this means that some error is introduced. In order to
calculate how much error, a combination of Equation 1
and Equation 3 is used to calculate the expected out-
put frequency. See Equation 5.
(MIN FREQUENCY OF SELECTED OFFSET
f_OUTPUT
=
RANGE) + (DAC
VALUE x 10kHz STEP SIZE)
prescaler
(5)
f_OUTPUT
= ^{(81.92MHz) + (655 x 10kHz)} =
8
88.47MHz _{= 11.05875MHz}
8
The expected output frequency is not exactly equal to the
desired frequency of 11.0592MHz. The difference is
450Hz. In terms of percentage, Equation 6 shows that the
expected error is 0.004%. The expected error assumes
typical values and does not include deviations from the
typical as specified in the electrical tables.
%ERROR_EXPECTED
=
f_DESIRED − f_EXPECTED
f_DESIRED
×
100
(6)
%ERROR_EXPECTED
=
11.0592MHz − 11.05875MHz
11.0592MHz
× 100 = ^450Hz × 100 = 0.004%
11.0592MHz
Example #2: Calculate the register values needed to
generate a desired output frequency of 100MHz.
Since the desired frequency is already within the valid
master oscillator frequency range, the prescaler is set
to divide by 1, and hence, PRESCALER = 00h (for 4%
peak dither) or 10h (for 2% peak dither).
(7)
f_{MASTER OSCILLATOR} = 100.0MHz x 2⁰ = 100.0MHz
Next, looking at Table 2, OS + 1 provides a range of
frequencies centered around the desired frequency. In
order to determine what value to write to the OFFSET
register, the RANGE register must first be read.
Assuming 12h was read in this example, 13h (OS + 1)
is written to the OFFSET register.
Finally, the DAC value is calculated as shown in
Equation 8.
(8)
DAC VALUE = ^{(100.0MHz − 97.28MHz)} = 272.00 (decimal)
10kHz STEP SIZE
The result is then converted to hex (0110h) and then
left-shifted, resulting in 4400h to be programmed into
the DAC register.
In summary, the DS1086 is programmed as follows:
PRESCALER = 00h (4% peak dither) or 10h (2% peak
dither)
OFFSET = OS + 1 or 13h (if RANGE was read as 12h)
DAC = 4400h
(9)
f_OUTPUT
= ^{(97.28MHz) + (272 × 10kHz)} =
2⁰
100.0MHz _{= 100.0MHz}
1
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