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DS14285 Datasheet, PDF (21/25 Pages) Dallas Semiconductor – Real Time Clock with NV RAM Control
POWER-DOWN/POWER-UP TIMING
DS14285/DS14287
POWER-DOWN/POWER-UP TIMING
PARAMETER
SYMBOL
CS at VIH before Power-Down
tPD
VCC slew from 4.5V to 0V ( CS at VIH)
tF
VCC slew from 0V to 4.5V ( CS at VIH)
tR
CS at VIH after Power-Up
tREC
Chip Enable Propagation Delay to
tCED
External SRAM
MIN
0
300
100
20
TYP
MAX
200
10
UNITS
µs
µs
µs
ms
ns
NOTES
(tA = 25°C)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
Expected Data Retention for DS14287
tDR
10
years
10
NOTE:
The real-time clock will keep time to an accuracy of+1 minute per month during data retention time for
the period of tDR.
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when device is in battery
backup mode.
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