DS1710 Datasheet, PDF (2/14 Pages) Dallas Semiconductor – Partitioned NV Controller

DS1710
DESCRIPTION
The DS1710 is a low-power CMOS circuit which solves the application problems of converting CMOS
RAMS into nonvolatile memories. In addition the device has the ability to unconditionally write protect
blocks of memory so that inadvertent write cycles do not corrupt program and special data space. The
incoming power supply voltage at the V_CCI input pin is constantly monitored for an out-of-tolerance
condition. When such a condition is detected, both the chip enable and write enable outputs are inhibited
to protect stored data. The battery inputs are used to supply V_CCO with power when V_CCI is less than the
battery input voltages. Special circuitry uses a low leakage CMOS process which affords precise voltage
detection at extremely low current consumption. By combining the DS1710 Partitioned NV Controller
chip with a CMOS memory and batteries, nonvolatile RAM operation can be achieved.
The DS1710 Partitioned NV Controller incorporates all the functions of the DS1610 with the additional
feature of either +3.0V or +5.0V operation. The DS1710 functions like the Dallas Semiconductor DS1210
NV controller when the ( DIS) disable pin is grounded and also incorporates the power-up auto sensing.
An internal pulldown resistor to ground on the DIS pin of the DS1710S allows it to retrofit into DS1210S
applications. When the DIS pin is grounded the address inputs A_W - A_Z and the write enable input WEI
are ignored. Also the power-fail output PFO and the write enable output WEO are tristated.
POWER-UP AUTO SENSING
V_CCI will accept either +3.0V or +5.0V input. Selection of 3V operation is automatically invoked when
V_CC rises and remains between V_CCTP2 and V_CCTP1 for t_REC. 5V operation is automatically selected if V_CC
rises and remains above both V_CCTP2 and V_CCTP1 for t_REC. In either case, t_REC is measured from the time
V_CC first rises above V_CCTP2. The DS1710 will not change modes until V_CC falls below V_CCTP2.
OPERATION - DISABLE PIN CONNECTED TO V_CCO
The DS1710 performs five circuit functions required to battery-backup a RAM. First, a switch is provided
to direct power from the battery or the incoming power supply (V_CCI) depending on which is greater. This
switch has a voltage drop of less than 0.2 volts. The second function provided by the DS1710 is power-
fail detection. The incoming supply (V_CCI) is constantly monitored. When the supply goes out of
tolerance a precision comparator detects power failure and inhibits both the chip enable output ( CEO ) and
the write enable output ( WEO ). A third function of write protection is accomplished by holding both the
chip enable output CEO and write enable output WEO to within 0.2 volts of V_CCO when V_CCI is out of
tolerance. If CEI is low at the time that power-fail detection occurs the CEO signal is kept low until CEI
is brought high again. However, CEO is forced high after 1.5 µs regardless of the state of CEI . Similarly,
if WEI is low at the time that power-fail detection occurs, the WEO signal will remain low until WEI is
brought high or 1.5 µs elapses. The delay of write protection until the current memory cycle is complete
prevents corrupted data. Power-fail detection occurs in the range of 4.75 to 4.5 volts with the tolerance
pin TOL grounded and in 5-volt mode. If the tolerance pin is connected to V_CCO while in 5-volt mode,
then power-fail detection occurs in the range of 4.5 volts to 4.25 volts. If in 3-volt mode, the power-fail
detection will occur in the range of 2.7 to 2.5 volts. The PF0 signal is driven low and remains low until
V_CCI returns to nominal conditions. During nominal supply conditions CEO will follow CEI and WEO
will follow WEI . The fourth function which the DS1710 performs is a battery status warning so that
potential data loss is avoided. Each time V_CCI is applied to the device battery status is checked with a
precision comparator. If during battery backup, no switch occurred from one battery to the other, the
voltage of the battery supplying power when V_CCI is applied is checked. If this voltage is less than 2.0
volts the second chip enable cycle after power is applied is inhibited. If any switch from one battery to
another did occur the voltage of both batteries is checked. If either voltage is less than 2.0 volts the
second chip enable cycle will be inhibited. Battery status can therefore be determined by performing a
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