DS1710 Datasheet, PDF (11/14 Pages) Dallas Semiconductor – Partitioned NV Controller

NOTES:
1. All voltages are reference to ground
DS1710
2. Only one battery input is required.
3. Measured with outputs open circuited.
4. I_CC01 is the maximum average load which the DS1710 can supply to the memories.
5. Z_CE is an average input-to-output impedance as the input is swept from ground to V_CCI and less than 4
mA is forced through Z_CE.
6. I_CC02 is the maximum average load current which the DS1710 can supply to the memories in the
battery backup mode.
7. t_CE max must be met to insure data integrity on power loss.
8. Chip Enable Output CEO can only sustain leakage current in the battery mode.
9. Applies only when loading partition switch.
10. Measured with a load as shown in Figure 1.
11. Measured with DIS at a logic high level.
12. CEO and WEO will be held high for a time equal to t_REC after V_CCI crosses V_CCTP2.
13. t_R is the slew rate of V_CCI from 4.25V to 4.75V or 2.50 to +2.70 volts.
14. CEI , WEI , A_W - A_Z run at minimum timing set and at voltage levels of 0V to 3V.
15. All inputs within 0.3V of ground or V_CCI and CEI within 0.3V of V_CCI.
16. The power-fail output signal ( PFO ) is driven active (V_OL = 0.4V) when the V_CC trip point occurs.
While active, the PFO pin can sink 4 mA and will maintain a maximum output voltage of 0.4 volts.
When inactive, the voltage output of PFO is 2.4 volts minimum and will source a current of 1 mA.
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