DS1265W Datasheet, PDF (2/8 Pages) Dallas Semiconductor – 3.3V 8Mb Nonvolatile SRAM

DS1265W
READ MODE
The DS1265 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 20 address inputs
(A₀–A₁₉) defines which of the 1,048,576 bytes of data is accessed. Valid data will be available to the
eight data output drivers within t_ACC (Access Time) after the last address input signal is stable, providing
that CE and OE access times are also satisfied. If OE and CE access times are not satisfied, then data
access must be measured from the later-occurring signal ( CE or OE ) and the limiting parameter is either
t_CO for CE or t_OE for OE rather than t_ACC.
WRITE MODE
The DS1265 devices execute a write cycle whenever WE and CE signals are active (low) after address
inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the write cycle.
The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must be kept
valid throughout the write cycle. WE must return to the high state for a minimum recovery time (t_WR)
before another cycle can be initiated. The OE control signal should be kept inactive (high) during write
cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE active), then WE
will disable the outputs in t_ODW from its falling edge.
DATA-RETENTION MODE
The DS1265W provides full functional capability for V_CC greater than 3.0V and write protects by 2.8V.
Data is maintained in the absence of V_CC without any additional support circuitry. The nonvolatile static
RAMs constantly monitor V_CC. Should the supply voltage decay, the NV SRAMs automatically write
protect themselves, all inputs become “don’t care,” and all outputs become high-impedance. As V_CC falls
below approximately 2.5V, a power-switching circuit connects the lithium energy source to RAM to
retain data. During power-up, when V_CC rises above approximately 2.5V, the power-switching circuit
connects external V_CC to RAM and disconnects the lithium energy source. Normal RAM operation can
resume after V_CC exceeds 3.0V.
FRESHNESS SEAL
Each DS1265 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When V_CC is first applied at a level greater than V_TP, the lithium
energy source is enabled for battery backup operation.
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