DS3181 Datasheet, PDF (124/400 Pages) Maxim Integrated Products – Single/Dual/Triple/Quad ATM/Packet PHYs with Built-In LIU

DS3181/DS3182/DS3183/DS3184
Table 10-24. TCLKOn/TGCLKn/TPOHCLKn Output Pin Functions
FM[5:0]
PORT.CR2
0XX00X (FRM)
0XX00X (FRM)
0XX00X (FRM)
0XX010 (IFRAC)
0XX010 (IFRAC)
0XX010 (IFRAC)
0XX011 (XFRAC)
0XX10X (PLCP)
0XX10X (PLCP)
0XX10X (PLCP)
0XX110 (FFRAC)
0XX110 (FFRAC)
1XX0XX (CLR)
1XX0XX (CLR)
TPFPE
PORT.CR3
0
1
1
0
1
1
X
0
1
1
X
X
0
1
TCLKS
PORT.CR3
X
0
1
X
0
1
X
X
0
1
0
1
X
X
PIN
FUNCTION
Low
TGCLKn
TCLKOn
Low
TGCLKn
TCLKOn
TCLKOn
Low
TPOHCLKn
TCLKOn
Low
TCLKOn
Low
TCLKOn
GAP SOURCE
none
TDENn
none
none
TFOHENOn
none
none
none
none
none
none
none
none
none
Table 10-25. TPDATn Input Pin Functions
FM[5:0]
PORT.CR2
0XX0XX (FRM)
0XXX0X (FRM)
0XX110 (FFRAC)
1XXXXX (CLR)
TPFPE
PORT.CR3
X
X
X
X
PIN
FUNCTION
Low
Low
TPDATn
Low
Table 10-26. TPDENOn Output Pin Functions
FM[5:0]
PORT.CR2
0XX0XX (FRM)
0XXX0X (FRM)
0XX110 (FFRAC)
1XXXXX (CLR)
TPFPE
PORT.CR3
X
X
X
X
PIN
FUNCTION
Low
Low
TPDENOn
Low
10.5.9.2 Receive PLCP/Fractional port pins
The receive PLCP/Fractional pins are RPOHn / RSERn, RFOHENIn / RPDENIn, RPDATn, RPOHSOFn / RSOFOn
/ RDENn / RFOHENOn and RPOHCLKn / RCLKOn / RGCLKn. They have different functions based on the framing
mode and other pin mode bits. Unused input pin functions should drive a logic zero into the device circuits
expecting a signal from that pin. The control bits that configure these pins are PORT.CR2.FM[5:0],
PORT.CR3.RPFPE, PORT.CR3.RSOFOS and PORT.CR3.RCLKS.
Table 10-27 to Table 10-31 describe the function selected by the FM bits and other pin mode bits for the
multiplexed pins.
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