BTB9435J3 Datasheet, PDF (8/8 Pages) Cystech Electonics Corp. – Low Vcesat PNP Epitaxial Planar Transistor

CYStech Electronics Corp.
TO-252 Dimension
Spec. No. : C809J3
Issued Date : 2008.06.12
Revised Date: 2014.03.25
Page:8/8
Marking:
4
3-Lead TO-252 Plastic Surface Mount Package
CYStek Package Code: J3
Device Name
Date code :
Year +Month
Year code : 1
→2011, 2→
2012, …etc.
Month code :
1→Jan, 2→ ¹
Feb, …, 9→
Sep, A→Oct,
B→Nov, C→
Dec
B9435
□□
2
3
Style: Pin 1.Base 2.Collector 3.Emitter
4.Collector
DIM
Inches
Min. Max.
Millimeters
Min. Max.
DIM
Inches
Min. Max.
Millimeters
Min. Max.
A 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386
A1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772
B 0.039 0.048 0.990 1.210 H
0.163 REF
4.140 REF
b 0.026 0.034 0.660 0.860 K
0.190 REF
4.830 REF
b1 0.026 0.034 0.660 0.860 L 0.386 0.409 9.800 10.400
C 0.018 0.023 0.460 0.580 L1
0.114 REF
2.900 REF
C1 0.018 0.023 0.460 0.580 L2 0.055 0.067 1.400 1.700
D 0.256 0.264 6.500 6.700 L3 0.024 0.039 0.600 1.000
D1 0.201 0.215 5.100 5.460 P
0.026 REF
0.650 REF
E 0.236 0.244 6.000 6.200 V
0.211 REF
5.350 REF
Notes: 1.Controlling dimension: millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material:
• Lead : Pure tin plated.
• Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
BTB9435J3
CYStek Product Specification