MTB09P03J3 Datasheet, PDF (5/9 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C808J3
Issued Date : 2010.01.18
Revised Date : 2013.12.26
Page No. : 5/9
Typical Characteristics(Cont.)
10000
Capacitance vs Drain-to-Source Voltage
Ciss
Threshold Voltage vs Junction Tempearture
1.8
1.6
ID=-250uA
1.4
1000
1.2
C _oss
1
Crss
0.8
100
0.6
0.1
1
10
100
-60
-20
20
60
100 140
-VDS, Drain-Source Voltage(V)
Tj, Junction Temperature(°C)
Maximum Safe Operating Area
1000
100 R_DSON
Limited
10
1
10μs
100μs
1ms
10ms
100ms
DC
VGS=-10V,
0.1 TC=150°C
Single Pulse
0.01
0.1
1
10
100
-VDS, Drain-Source Voltage(V)
Forward Transfer Admittance vs Drain Current
100
10
1
VDS=-10V
0.1
Pulsed
Ta=25°C
0.01
0.001 0.01
0.1
1
10
100
-ID, Drain Current(A)
Gate Charge Characteristics
10
VDS=-5V
8
VDS=-10V
6
4
VDS=-15V
2
ID=-10A
0
0
15
30
45
60
75
Qg, Total Gate Charge(nC)
Maximum Drain Current vs Case Temperature
90
80
70
60
50
40
30
20
10
0
25
50 75 100 125 150 175
TC, Case Temperature(°C)
MTB09P03J3
CYStek Product Specification