MTB09P03J3 Datasheet, PDF (3/9 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C808J3
Issued Date : 2010.01.18
Revised Date : 2013.12.26
Page No. : 3/9
Ciss
-
4400
-
Coss
-
486
-
pF
Crss
-
405
-
Rg
-
3
-
Ω
Source-Drain Diode
IS *1
ISM *3
-
-
-
-
-75
-160
A
VSD *1
-
-
-1.2
V
trr
-
47
-
ns
Qrr
-
43
-
nC
Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
*2.Independent of operating temperature
*3.Pulse width limited by maximum junction temperature.
VGS=0V, VDS=-15V, f=1MHz
VGS=15mV, VDS=0, f=1MHz
IF=-24A, VGS=0V
IF=IS, dIF/dt=100A/μs
Recommended soldering footprint
MTB09P03J3
CYStek Product Specification