MTB09P03J3 Datasheet, PDF (4/9 Pages) Cystech Electonics Corp. – P-Channel Logic Level Enhancement Mode Power MOSFET

CYStech Electronics Corp.
Spec. No. : C808J3
Issued Date : 2010.01.18
Revised Date : 2013.12.26
Page No. : 4/9
Typical Characteristics
Typical Output Characteristics
200
10V
180 _9V
160 8V
140 ^7V
6V
120
100
80
-VGS=5V
-VGS=4V
60
40
-VGS=3V
20
0
0
-VGS=2V
2
4
6
8
10
-VDS, Drain-Source Voltage(V)
1000
Static Drain-Source On-State resistance vs Drain Current
100
VGS=-2.5V
Brekdown Voltage vs Ambient Temperature
40
38
36
34
32
ID=-250μA,
VGS=0V
30
-100 -50
0
50 100 150 200
Tj, Junction Temperature(°C)
Reverse Drain Current vs Source-Drain Voltage
1.2
VGS=0V
1
Tj=25°C
0.8
10
VGS=-3V
VGS=-4.5V
VGS=-10V
1
0.001 0.01
0.1
1
10
100
-ID, Drain Current(A)
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
200
0.6
Tj=150°C
0.4
0.2
0
2
4
6
8
10
-IDR, Reverse Drain Current(A)
Drain-Source On-State Resistance vs Junction Tempearture
20
160
15
VGS=-4.5V, ID=-10A
120
10
80
VGS=-10V, ID=-25A
40
ID=-25A
5
0
0
2
4
6
8
10
-VGS, Gate-Source Voltage(V)
0
-60 -20 20
60 100 140 180
Tj, Junction Temperature(°C)
MTB09P03J3
CYStek Product Specification