CY8C54LP Datasheet, PDF (90/117 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PRELIMINARY
PSoC^® 5LP: CY8C54LP Family
Datasheet
Figure 11-53. VDAC Full Scale Error vs Temperature, 1 V
Mode
Figure 11-54. VDAC Full Scale Error vs Temperature, 4 V
Mode
Figure 11-55. VDAC Operating Current vs Temperature, 1V
Mode, Slow Mode
Figure 11-56. VDAC Operating Current vs Temperature, 1 V
Mode, Fast Mode
Table 11-30. VDAC AC Specifications
Parameter
F_DAC
TsettleP
TsettleN
Description
Conditions
Update rate
1 V scale
4 V scale
Settling time to 0.1%, step 25% to 1 V scale, Cload = 15 pF
75%
4 V scale, Cload = 15 pF
Settling time to 0.1%, step 75% to 1 V scale, Cload = 15 pF
25%
4 V scale, Cload = 15 pF
Voltage noise
Range = 1 V, fast mode,
V_DDA = 5 V, 10 kHz
Document Number: 001-84934 Rev. **
Min Typ
Max
–
–
1000
–
–
250
–
0.45
1
Units
ksps
ksps
µs
–
0.8
3.2
µs
–
0.45
1
µs
–
0.7
–
750
3
µs
–
nV/sqrtHz
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