W230-03 Datasheet, PDF (9/15 Pages) Cypress Semiconductor – Spread Spectrum FTG for VIA K7 Chipset

PRELIMINARY
W230-03
Absolute Maximum Ratings^[2]
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
.
Parameter
Description
V_DD, V_IN
T_STG
T_B
T_A
T_C
ESD_PROT
Voltage on any pin with respect to GND
Storage Temperature
Ambient Temperature under Bias
Operating Temperature
Case Temperature
Input ESD Protection
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
–55 to +125
°C
0 to +70
°C
115
°C
2 (min.)
kV
DC Electrical Characteristics: T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5%
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
I_DD
3.3V Supply Current
CPUT0, CPUC0,
CPU_CS =100 MHz
Outputs Loaded^[3]
260
mA
I_DD
2.5V Supply Current
CPUT0, CPUC0,
CPU_CS =100 MHz
Outputs Loaded^[3]
25
mA
Logic Inputs
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_IL
Input Low Current^[4]
I_IH
Input High Current^[4]
Clock Outputs
GND – 0.3
2.0
0.8
V
V_DD + 0.3
V
–25
µA
10
µA
V_OL
Output Low Voltage
I_OL = 1 mA
V_OH
Output High Voltage
I_OH = –1 mA
3.1
V_OL
Output Low Voltage CPU_CS,
Termination to V pull-up
0
CPUT0, CPUC0 (external)
50
mV
V
0.3
V
V_OH
Output High Voltage CPU_CS,
Termination to V pull-up
1.0
CPUT0, CPUC0 (external)
1.2
V
I_OL
Output Low Current PCI0:5
V_OL = 1.5V
70
110
135
mA
REF0:1
V_OL = 1.5V
50
70
100
mA
48 MHz
V_OL = 1.5V
50
70
100
mA
24 MHz
V_OL = 1.5V
50
70
100
mA
SDRAM0:12
V_OL = 1.5V
70
110
135
mA
I_OH
Output High Current PCI0:5
V_OH = 1.5V
70
110
135
mA
REF0:1
V_OH = 1.5V
50
70
100
mA
48 MHz
V_OH = 1.5V
50
70
100
mA
24 MHz
V_OH = 1.5V
50
70
100
mA
SDRAM0:12
V_OH = 1.5V
70
110
135
mA
Notes:
2. Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. All clock outputs loaded with 6" 60Ω transmission lines with 20-pF capacitors.
4. W230-03 logic inputs (except FS3) have internal pull-up devices (pull-ups not full CMOS level). Logic input FS3 has an internal pull-down device.
Document #: 38-07357 Rev. *A
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