W215B Datasheet, PDF (8/14 Pages) Cypress Semiconductor – Uses external 14.318-MHz crystal

PRELIMINARY
W215B
48-/24-MHz Clock Output (Lump Capacitance Test Load = 20 pF)
Parameter
Description
m/n
PLL Ratio
t_R
Output Rise Edge Rate
t_F
Output Fall Edge Rate
t_D
Duty Cycle
f_ST
Frequency Stabilization
from Power-up (cold start)
Z_o
AC Output Impedance
Test Condition/Comments
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to fre-
quency stabilization.
Average value during switching transition. Used
for determining series termination value.
CPU = 100 MHz
Min. Typ. Max.
57/17
0.5
2
0.5
2
45
50
55
3
25
Unit
V/ns
V/ns
%
ms
Ω
AC Electrical Characteristics (Transmission Line Model)
T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5% (3.135–3.465V), f_XTL = 14.31818 MHz, V_DDQ2 = 3.3±5%
AC clock parameters are tested and guaranteed over stated operating conditions using the stated transmission line load at the
clock output.
FTG
22 Ohm
6 inches 60 Ohm trace
CPU Clock Outputs, CPU0:3 (Test Load: R = 33Ω; C = 22 pF)
Parameter
t_P
f
t_H
t_L
t_R
t_F
t_D
t_JC
t_SK
f_ST
Z_o
Description
Period
Frequency, Actual
High Time
Low Time
Output Rise Edge Rate
Output Fall Edge Rate
Duty Cycle
Jitter, Cycle-to-Cycle
Output Skew
Frequency Stabilization from
Power-up (cold start)
AC Output Impedance
Test Condition/Comments
Measured on rising edge at 1.5V
Determined by PLL divider ratio
Duration of clock cycle above 2.4V
Duration of clock cycle below 0.4V
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Measured on rising edge at 1.5V. Maximum differ-
ence of cycle time between two adjacent cycles.
Measured on rising edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to frequency
stabilization.
Average value during switching transition. Used for
determining series termination value.
CPU = 100 MHz
Min. Typ. Max.
10
100
5
5
1
4
1
4
45 50 55
250
250
3
10
Unit
ns
MHz
ns
ns
V/ns
V/ns
%
ps
ps
ms
Ω
Document #: 38-07222 Rev. *A*
Page 8 of 14