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CY8C58LP_13 Datasheet, PDF (77/122 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)
PSoC® 5LP: CY8C58LP Family
Datasheet
11.5 Analog Peripherals
Specifications are valid for –40 °C ≤ TA ≤ 85 °C and TJ ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted.
11.5.1 Opamp
Table 11-18. Opamp DC Specifications
Parameter
Description
Conditions
Min
VI
Input voltage range
Vos
Input offset voltage
VSSA
–
Operating temperature –40 °C to
–
70 °C
TCVos Input offset voltage drift with temperature Power mode = high
–
Ge1
Gain error, unity gain buffer mode
Rload = 1 kΩ
–
Cin
Input capacitance
Routing from pin
–
Vo
Output voltage range
1 mA, source or sink, power mode VSSA + 0.05
= high
Iout
Output current capability, source or sink VSSA + 500 mV ≤ Vout ≤ VDDA –500
25
mV, VDDA > 2.7 V
Idd
Quiescent current[38]
VSSA + 500 mV ≤ Vout ≤ VDDA –500
16
mV, 1.7 V = VDDA ≤ 2.7 V
Power mode = min
–
Power mode = low
–
Power mode = med
–
Power mode = high
–
CMRR
Common mode rejection ratio[38]
80
PSRR
Power supply rejection ratio[38]
Vdda ≥ 2.7 V
85
Vdda < 2.7 V
70
Typ
Max
–
VDDA
–
2.5
–
2
–
±30
–
±0.1
–
18
– VDDA –
0.05
–
–
–
–
250
250
330
1000
–
–
–
400
400
950
2500
–
–
–
Units
V
mV
mV
µV / °C
%
pF
V
mA
mA
uA
uA
uA
uA
dB
dB
dB
Figure 11-19. Opamp Voffset Histogram, 3388 samples/847
parts, 25 °C, VDDA = 5 V
Figure 11-20. Opamp Voffset vs Temperature, VDDA = 5 V
Note
38. Based on device characterization (Not production tested).
Document Number: 001-84932 Rev. *C
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