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CY8C58LP_13 Datasheet, PDF (74/122 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®) | |||
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PSoC® 5LP: CY8C58LP Family
Datasheet
11.4.3 USBIO
For operation in GPIO mode, the standard range for VDDD applies, see Device Level Specifications on page 63.
Table 11-13. USBIO DC Specifications
Parameter
Rusbi
Rusba
Vohusb
Volusb
Vihgpio
Vilgpio
Vohgpio
Volgpio
Vdi
Vcm
Vse
Rps2
Rext
Description
Conditions
USB D+ pull-up resistance[35]
With idle bus
USB D+ pull-up resistance[35]
While receiving traffic
Static output high[35]
15 kΩ ±5% to Vss, internal pull-up
enabled
Static output low[35]
15 kΩ ±5% to Vss, internal pull-up
enabled
Input voltage high, GPIO mode[35] VDDD = 1.8 V
VDDD = 3.3 V
VDDD = 5.0 V
Input voltage low, GPIO mode[35] VDDD = 1.8 V
VDDD = 3.3 V
VDDD = 5.0 V
Output voltage high, GPIO
mode[35]
IOH = 4 mA, VDDD = 1.8 V
IOH = 4 mA, VDDD = 3.3 V
IOH = 4 mA, VDDD = 5.0 V
Output voltage low, GPIO mode[35] IOL = 4 mA, VDDD = 1.8 V
IOL = 4 mA, VDDD = 3.3 V
IOL = 4 mA, VDDD = 5.0 V
Differential input sensitivity
|(D+)â(Dâ)|
Differential input common mode
range
Single ended receiver threshold
PS/2 pull-up resistance[35]
External USB series resistor[35]
In PS/2 mode, with PS/2 pull-up
enabled
In series with each USB pin
Zo
CIN
IIL[35]
USB driver output impedance[35] Including Rext
USB transceiver input capacitance
Input leakage current (absolute
value)[35]
25 °C, VDDD = 3.0 V
Min
0.900
1.425
2.8
â
1.5
2
2
â
â
â
1.6
3.1
4.2
â
â
â
â
0.8
0.8
3
21.78
(â1%)
28
â
â
Typ
Max
â
1.575
â
3.090
â
3.6
â
0.3
â
â
â
â
â
â
â
0.8
â
0.8
â
0.8
â
â
â
â
â
â
â
0.3
â
0.3
â
0.3
â
0.2
â
2.5
â
2
â
7
22 22.22 (+1%)
â
44
â
20
â
2
Units
kΩ
kΩ
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
kΩ
Ω
Ω
pF
nA
Note
35. Based on device characterization (Not production tested).
Document Number: 001-84932 Rev. *C
Page 74 of 122
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