W158_02 Datasheet, PDF (7/13 Pages) Cypress Semiconductor – Spread Spectrum System Frequency Synthesizer

W158
Absolute Maximum Ratings^[29]
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
.
Parameter
Description
V_DD, V_IN
T_STG
T_A
T_B
ESD_PROT
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
2 (min.)
kV
DC Electrical Characteristics: T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5%, V_DDQ2 = 2.5V±5%
Parameter
Description
Test Condition
Min.
Typ.
Max.
Supply Current
I_DD-3.3V
Combined 3.3V Supply Current
CPU0:3 =133 MHz^[30]
160
I_DD-2.5
Combined 2.5V Supply Current
CPU0:3 =133 MHz^[30]
90
Logic Inputs (All referenced to V_DDQ3 = 3.3V)
V_IL
Input Low Voltage
GND
0.8
–0.3
V_IH
Input High Voltage
I_IL
Input Low Current^[31]
I_IH
Input High Current^[31]
I_IL
Input Low Current, SEL133/100#^[31]
I_IH
Input High Current, SEL133/100#^[31]
Clock Outputs
2.0
VDD+
0.3
–25
10
–5
5
CPU, CPUdiv2, IOAPIC (Referenced to V_DDQ2)
Test Condition
Min.
Typ.
Max.
V_OL
Output Low Voltage
I_OL = 1 mA
50
V_OH
Output High Voltage
I_OH = –1 mA
2.2
I_OL
Output Low Current
V_OL = 1.25V
45
65
100
I_OH
Output High Current
V_OH = 1.25V
45
65
100
48MHz, REF (Referenced to V_DDQ3)
Test Condition
Min.
Typ.
Max.
V_OL
Output Low Voltage
I_OL = 1 mA
50
V_OH
Output High Voltage
I_OH = –1 mA
3.1
I_OL
Output Low Current
V_OL = 1.5V
45
65
100
I_OH
Output High Current
V_OH = 1.5V
45
65
100
PCI, 3V66 (Referenced to V_DDQ3)
Test Condition
Min.
Typ.
Max.
V_OL
Output Low Voltage
I_OL = 1 mA
50
V_OH
Output High Voltage
I_OH = –1 mA
3.1
I_OL
Output Low Current
V_OL = 1.5V
70
100
145
I_OH
Output High Current
V_OH = 1.5V
65
95
135
Notes:
29. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
30. All clock outputs loaded with 6" 60Ω transmission lines with 20-pF capacitors.
31. W158 logic inputs have internal pull-up devices, except SEL133/100# (pull-ups not CMOS level).
Unit
mA
mA
V
V
µA
µA
µA
µA
Unit
mV
V
mA
mA
Unit
mV
V
mA
mA
Unit
mV
V
mA
mA
Document #: 38-07164 Rev. *A
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