W158_02 Datasheet, PDF (11/13 Pages) Cypress Semiconductor – Spread Spectrum System Frequency Synthesizer

W158
IOAPIC Clock Outputs, IOAPIC0:2 (Lump Capacitance Test Load = 20 pF)
Parameter
Description
Test Condition/Comments
Min
f
Frequency
Note 39
t_R
Output Rise Edge Rate Measured from 0.4V to 2.0V
1
t_F
Output Fall Edge Rate
Measured from 2.0V to 0.4V
1
t_D
Duty Cycle
Measured on rising and falling edge at 1.25V
45
f_ST
Frequency Stabilization Assumes full supply voltage reached within
from Power-up (cold start) 1 ms from power-up. Short cycles exist prior to
frequency stabilization.
Z_o
AC Output Impedance
Average value during switching transition. Used
for determining series termination value.
Note:
39. IOAPIC clock is CPU/8 for CPU = 133 MHz and CPU/6 for CPU = 100 MHz.
Typ Max
16.67
4
4
55
3
20
Unit
MHz
V/ns
V/ns
%
ms
Ω
Ordering Information
Ordering Code
Package
Name
W158
H
Package Type
56-pin SSOP (300 mils)
Document #: 38-07164 Rev. *A
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