CY82C693UB Datasheet, PDF (67/164 Pages) Cypress Semiconductor – hyperCache TM / Stand-Alone PCI Peripheral Controller with USB

PRELIMINARY
CY82C693UB
Register 7A: Power Management Interrupt Request Status Register #2 (Read/Write) − Index=7AH
Bit
Function
7
Assertion of IRQ15 (Interrupt Request 15)
0:
SMI was not caused by an IRQ15
1:
SMI was caused by an IRQ15
WRITE:
0:
No change to register
1:
Clear Register
6
Assertion of IRQ14 (Interrupt Request 14)
0:
SMI was not caused by an IRQ14
1:
SMI was caused by an IRQ14
WRITE:
0:
No change to register
1:
Clear Register
5
Assertion of IRQ13 (Interrupt Request 13)
0:
SMI was not caused by an IRQ13
1:
SMI was caused by an IRQ13
WRITE:
0:
No change to register
1:
Clear Register
4
Assertion of IRQ12 (Interrupt Request 12)
0:
SMI was not caused by an IRQ12
1:
SMI was caused by an IRQ12
WRITE:
0:
No change to register
1:
Clear Register
3
Assertion of IRQ11 (Interrupt Request 11)
0:
SMI was not caused by an IRQ11
1:
SMI was caused by an IRQ11
WRITE:
0:
No change to register
1:
Clear Register
2
Assertion of IRQ10 (Interrupt Request 10)
0:
SMI was not caused by an IRQ10
1:
SMI was caused by an IRQ10
WRITE:
0:
No change to register
1:
Clear Register
1
Assertion of IRQ9 (Interrupt Request 9)
0:
SMI was not caused by an IRQ9
1:
SMI was caused by an IRQ9
WRITE:
0:
No change to register
1:
Clear Register
0
Assertion of IRQ8 (Interrupt Request 8)
0:
SMI was not caused by an IRQ8
1:
SMI was caused by an IRQ8
WRITE:
0:
No change to register
1:
Clear Register
Default
0
0
0
0
00
0
0
0
67