CY8C55_11 Datasheet, PDF (64/112 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PRELIMINARY
PSoC^® 5: CY8C55 Family Datasheet
Figure 11-8. Efficiency vs Switching Frequency
V_OUT = 3.3 V, V_BAT = 2.4 V, I_OUT = 40 mA
11.1 Inputs and Outputs
Specifications are valid for –40 °C ≤ T_A ≤ 85 °C and T_J ≤ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted. Unless otherwise specified, all charts and graphs show typical values.
11.1.1 GPIO
Table 11-1. GPIO DC Specifications
Parameter
Description
V_IH
Input voltage high threshold
V_IL
Input voltage low threshold
Conditions
CMOS Input, PRT[x]CTL = 0
CMOS Input, PRT[x]CTL = 0
Min
Typ
0.7 × V_DDIO
–
–
–
V_IH
Input voltage high threshold
LVTTL Input, PRT[x]CTL = 1, V_DDIO < 2.7 V 0.7 x V_DDIO –
V_IH
Input voltage high threshold
LVTTL Input, PRT[x]CTL = 1, V_DDIO ≥ 2.7 V
2.0
–
V_IL
Input voltage low threshold
LVTTL Input, PRT[x]CTL = 1, V_DDIO < 2.7 V
–
–
V_IL
V_OH
V_OL
Rpullup
Input voltage low threshold
Output voltage high
Output voltage low
Pull-up resistor
LVTTL Input, PRT[x]CTL = 1, V_DDIO ≥ 2.7 V
–
–
I_OH = 4 mA at 3.3 V_DDIO
V_DDIO – 0.6
–
I_OH = 1 mA at 1.8 V_DDIO
V_DDIO – 0.5
–
I_OL = 8 mA at 3.3 V_DDIO
–
–
I_OL = 4 mA at 1.8 V_DDIO
–
–
3.5
5.6
Rpulldown Pull-down resistor
3.5
5.6
I_IL
Input leakage current (absolute
value)^[25]
25 °C, V_DDIO = 3.0 V
C_IN
Input capacitance^[25]
GPIOs without opamp outputs
GPIOs with opamp outputs
–
–
–
–
–
–
V_H
Input voltage hysteresis
(Schmitt-Trigger)^[25]
–
40
Idiode
Rglobal
Rmux
Current through protection diode
to V_DDIO and V_SSIO
Resistance pin to analog global bus 25 °C, V_DDIO = 3.0 V
Resistance pin to analog mux bus 25 °C, V_DDIO = 3.0 V
–
–
–
320
–
220
Note
25. Based on device characterization (Not production tested).
Max
–
0.3 ×
V_DDIO
–
–
0.3 x
V_DDIO
0.8
–
–
0.6
0.6
8.5
8.5
2
Units
V
V
V
V
V
V
V
V
V
V
kΩ
kΩ
nA
7
pF
18
pF
–
mV
100
µA
–
Ω
–
Ω
Document Number: 001-66235 Rev. **
Page 64 of 112
[+] Feedback