CY7C67200_13 Datasheet, PDF (63/92 Pages) Cypress Semiconductor – EZ-OTG™ Programmable USB On-The-Go Host/Peripheral Controller

CY7C67200
SPI Data Register [0xC0D6] [R/W]
Figure 68. SPI Data Register
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Read/Write
-
-
-
-
-
-
-
-
Default
X
X
X
X
X
X
X
X
Bit #
7
6
5
4
3
2
1
0
Field
Data
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
X
X
X
X
X
X
X
X
Register Description
The SPI Data register contains data received on the SPI port when read. Reading it empties the eight byte receive FIFO in PIO byte
mode. This receive data is valid when the receive bit of the SPI Interrupt Value is set to ‘1’ (RxIntVal triggers) or the Receive Data
Ready bit of the SPI Control register is set to ‘1’. Writing to this register in PIO byte mode will initiate a transfer of data, the number of
bits defined by Transmit Bit Length field in the SPI Control register.
Data (Bits [7:0])
The Data field contains data received or to be transmitted on the SPI port.
Reserved
All reserved bits must be written as ‘0’.
SPI Transmit Address Register [0xC0D8] [R/W]
Figure 69. SPI Transmit Address Register
Bit #
15
14
13
12
11
10
9
8
Field
Address...
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Address
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Register Description
The SPI Transmit Address register is used as the base address for the SPI transmit DMA.
Address (Bits [15:0])
The Address field sets the base address for the SPI transmit DMA.
Document Number: 38-08014 Rev. *I
Page 63 of 92