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CY7C67200_13 Datasheet, PDF (30/92 Pages) Cypress Semiconductor – EZ-OTG™ Programmable USB On-The-Go Host/Peripheral Controller
CY7C67200
Host n SOF/EOP Counter Register [R]
■ Host 1 SOF/EOP Counter Register 0xC094
■ Host 2 SOF/EOP Counter Register 0xC0B4
Figure 28. Host n SOF/EOP Counter Register
Bit #
15
14
13
12
11
10
9
8
Field
Reserved
Counter...
Read/Write
-
-
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
Bit #
7
6
5
4
3
2
1
0
Field
...Counter
Read/Write
R
R
R
R
R
R
R
R
Default
X
X
X
X
X
X
X
X
Register Description
The Host n SOF/EOP Counter register contains the current value
of the SOF/EOP down counter. This value can be used to
determine the time remaining in the current frame.
Host n Frame Register [R]
■ Host 1 Frame Register 0xC096
■ Host 2 Frame Register 0xC0B6
Figure 29. Host n Frame Register
Bit #
15
Field
Read/Write
-
Default
0
14
13
12
Reserved
-
-
-
0
0
0
Counter (Bits [13:0])
The Counter field contains the current value of the SOF/EOP
down counter.
11
10
9
8
Frame...
-
R
R
R
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Field
...Frame
Read/Write
R
R
R
R
R
R
R
R
Default
0
0
0
0
0
0
0
0
Register Description
The Host n Frame register maintains the next frame number to
be transmitted (current frame number + 1). This value is updated
after each SOF transmission. This register resets to 0x0000 after
each CPU write to the Host n SOF/EOP Count register (Host 1:
0xC092, Host 2: 0xC0B2).
Frame (Bits [10:0])
The Frame field contains the next frame number to be trans-
mitted.
Table 27. USB Device Only Registers
Register Name
Device n Endpoint n Control Register
Device n Endpoint n Address Register
Reserved
All reserved bits must be written as ‘0’.
USB Device Only Registers
There are ten sets of USB Device Only registers. All sets consist
of at least two registers, one for Device Port 1 and one for Device
Port 2. In addition, each Device port has eight possible
endpoints. This gives each endpoint register set eight registers
for each Device Port for a total of 16 registers per set. The USB
Device Only registers are covered in this section and summa-
rized in Table 27.
Address
(Device 1/Device 2)
R/W
0x02n0
R/W
0x02n2
R/W
Document Number: 38-08014 Rev. *I
Page 30 of 92