CY8C52_1106 Datasheet, PDF (53/95 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC) DC to 40 MHz operation

PRELIMINARY
PSoC^® 5: CY8C52 Family Datasheet
11. Electrical Specifications
Specifications are valid for –40 °C ≤ T_A ≤ 85 °C and T_J ≤ 100 °C, except where noted. Specifications are valid for 2.7 V to 5.5 V, except
where noted. The unique flexibility of the PSoC UDBs and analog blocks enable many functions to be implemented in PSoC Creator
components, see the component data sheets for full AC/DC specifications of individual functions. See the “Example Peripherals”
section on page 31 for further explanation of PSoC Creator components.
11.1 Absolute Maximum Ratings
Table 11-1. Absolute Maximum Ratings DC Specifications
Parameter
T_STG
V_DDA
V_DDD
V_DDIO
V_CCA
V_CCD
V_SSA
V_GPIO[11]
V_SIO
V_IND
V_BAT
Ivddio
LU
ESD_HBM
ESD_CDM
Description
Conditions
Storage temperature
Recommended storage temper-
ature is +25 °C ±25 °C. Extended
duration storage temperatures
above 85 °C degrade reliability.
Analog supply voltage relative to
V_SSA
Digital supply voltage relative to
V_SSD
I/O supply voltage relative to V_SSD
Direct analog core voltage input
Direct digital core voltage input
Analog ground voltage
DC input voltage on GPIO
Includes signals sourced by V_DDA
and routed internal to the pin.
DC input voltage on SIO
Output disabled
Output enabled
Voltage at boost converter input
Boost converter supply
Current per V_DDIO supply pin
Latch up current^[12]
Electrostatic discharge voltage Human body model
Electrostatic discharge voltage Charge device model
Min
–55
–0.5
–0.5
–0.5
–0.5
–0.5
V_SSD – 0.5
V_SSD – 0.5
V_SSD – 0.5
V_SSD – 0.5
0.5
V_SSD – 0.5
–
–140
500
500
Typ
Max
Units
25
100
°C
–
6
V
–
6
V
–
6
V
–
1.95
V
–
1.95
V
– V_SSD + 0.5 V
– V_DDIO + 0.5 V
–
7
V
–
6
V
–
5.5
V
–
5.5
V
–
20
mA
–
140
mA
–
–
V
–
–
V
Note Usage above the absolute maximum conditions listed in Table 11-1 may cause permanent damage to the device. Exposure to
maximum conditions for extended periods of time may affect device reliability. When used below maximum conditions but above
normal operating conditions the device may not operate to specification.
Notes
11. The V_DDIO supply voltage must be greater than the maximum analog voltage on the associated GPIO pins. Maximum analog voltage on GPIO pin ≤ V_DDIO ≤ V_DDA
12. Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch-up Test.
Document Number: 001-66236 Rev. *A
Page 53 of 95