W137 Datasheet, PDF (5/10 Pages) Cypress Semiconductor – Bx Notebook System Frequency Synthesizer

W137
Absolute Maximum Ratings
Stresses greater than those listed in this table may cause per-
manent damage to the device. These represent a stress rating
only. Operation of the device at these or any other conditions
.
Parameter
Description
V_DD, V_IN
T_STG
T_A
T_B
ESD_PROT
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
above those specified in the operating sections of this specifi-
cation is not implied. Maximum conditions for extended peri-
ods may affect reliability.
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
2 (min.)
kV
DC Electrical Characteristics:
T_A = 0°C to +70°C; V_DDQ3 = 3.3V±5%; V_DDQ2 = 2.5V±5%; CPU0:1 = 66.6/100 MHz
Parameter
Description
Test Condition
Min.
Typ.
Max. Unit
Supply Current
I_DD3PD
3.3V Supply Current in Power-down mode
I_DD3
3.3V Supply Current
I_DD2
2.5V Supply Current
I_DD2PD
2.5V Supply Current in Power-down mode
Logic Inputs
PWR_DWN# = 0
Outputs Loaded^[1]
Outputs Loaded^[1]
PWR_DWN# = 0
1
5
mA
80
100 mA
30
45
mA
0.2 µA
1
mA
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_IL
Input Low Current^[2]
I_IH
Input High Current^[2]
I_IL
Input Low Current (SEL100/66#)
I_IH
Input High Current (SEL100/66#)
Clock Outputs
GND – 0.3
2.0
0.8
V
V_DD + 0.3 V
–25
µA
10
µA
–5
µA
+5
µA
V_OL
Output Low Voltage
I_OL = 1 mA
V_OH
Output High Voltage
PCI_F, PCI1:5, I_OH = –1 mA
3.1
REF0:1
50
mV
V
V_OH
Output High Voltage
CPU0:1
I_OH = –1 mA
2.2
V
I_OL
Output Low Current:
CPU0:1
V_OL = 1.25V
80
120
180 mA
PCI_F, PCI1:5
V_OL = 1.5V
70
110
140 mA
REF0:1
V_OL = 1.5V
50
70
90
mA
I_OH
Output High Current
CPU0:1
V_OH = 1.25V
80
120
180 mA
PCI_F, PCI1:5
V_OH = 1.5V
70
110
140 mA
REF0:1
V_OH = 1.5V
50
70
90
mA
Crystal Oscillator
V_TH
X1 Input Threshold Voltage^[3]
VDDQ3 = 3.3V
1.65
V
C_LOAD
Load Capacitance, As Seen by External Crystal^[4]
14
pF
C_IN,X1
X1 Input Capacitance^[5]
Pin X2 unconnected
28
pF
Notes:
1. All clock outputs loaded with 6" 60Ω transmission lines with 20-pF capacitors.
2. CPU_STOP#, PCI_STOP#, PWR_DWN#, SPREAD#, and SEL48# logic inputs have internal pull-up resistors (not CMOS level).
3. X1 input threshold voltage (typical) is V_DD/2.
4. The W137 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is
14 pF; this includes typical stray capacitance of short PCB traces to crystal.
5. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).
5