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W137 Datasheet, PDF (1/10 Pages) Cypress Semiconductor – Bx Notebook System Frequency Synthesizer
W137
Bx Notebook System Frequency Synthesizer
Features
• Maximized EMI suppression using Cypress’s Spread
Spectrum Technology
• Two copies of CPU output
• Six copies of PCI output (Synchronous w/CPU output)
• One 48-MHz output for USB support
• One selectable 24-/48-MHz output
• Two Buffered copies of 14.318-MHz input reference
signal
• Supports 100-MHz or 66-MHz CPU operation
• Power management control input pins
• Available in 28-pin SSOP (209 mils)
• SS function can be disabled
• See W40S11-02 for 2 SDRAM DIMM support
Key Specifications
Supply Voltages: ....................................... VDDQ3 = 3.3V±5%
VDDQ2 = 2.5V±5%
CPU0:1 Output to Output Skew: ................................ 175 ps
CPU0:1 Cycle to Cycle Jitter: ..................................... 200 ps
Block Diagram
PCI_F, PCI1:5 Output to Output Skew:........................ 500 ps
PCI_F, PCI1:5 Cycle to Cycle Jitter: ............................ 250 ps
CPU to PCI Output Skew: ............... 1.5–4.0 ns (CPU Leads)
Output Duty Cycle: .................................................... 45/55%
PCI_F, PCI Edge Rate: .............................................. >1 V/ns
CPU_STOP#, OE, SPREAD#, SEL48#, PCI_STOP#,
PWR_DWN# all have a 250-kΩ pull-up resistor.
Table 1. Pin Selectable Frequency
SEL100/66# OE
CPU
PCI Spread%
0/1
0
HI-Z
HI-Z Don’t Care
0
1 66.6 MHz 33.3 See Table 2
1
1 100 MHz 33.3 See Table 2
Table 2. Spread Spectrum Feature
SPREAD#
Spread Profile
0
–0.5% (down spread)
1
0% (spread disabled)
Pin Configuration
X1
X2
CPU_STOP#
SPREAD#
SEL0
SEL1
SEL133/100#
PWRDWN#
PCI_STOP#
XTAL
OSC
2
REF0:1
PLL 1
Power
Down
Logic
STOP
Clock
Logic
÷2
÷2/÷1.5
STOP
Clock
Logic
STOP
÷2
Clock
Logic
÷2
4
CPU0:3
2
CPUdiv2_0:1
4
3V66_0:3
1
PCI_F
7
PCI1:7
3
IOAPIC0:2
GND 1
X1 2
X2 3
PCI_F 4
PCI1 5
PCI2 6
GND 7
VDDQ3 8
PCI3 9
PCI4 10
PCI5 11
VDDQ3 12
48MHz 13
24/48MHz/OE 14
28 VDDQ3
27 REF0/SEL48#
26 REF1/SPREAD#
25 VDDQ2
24 CPU0
23 CPU1
22 GND
21 GND
20 PCI_STOP#
19 VDDQ3
18 CPU_STOP#
17 PWR_DWN#
16 SEL100/66#
15 GND
Three-state
Logic
PLL2
1
48MHz
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
October 12, 1999, rev. **