W144_04 Datasheet, PDF (4/14 Pages) Cypress Semiconductor – 440BX AGPset Spread Spectrum Frequency Synthesizer

W144
Power-on
Reset
Timer
Output
Buffer
Output Three-state Hold
Output
Low
QD
Data
Latch
Jumper Options
10 kΩ
V_DD
Output Strapping Resistor
Series Termination Resistor
R
Clock Load
Resistor Value R
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Figure 2. Input Logic Selection Through Jumper Option
Spread Spectrum Feature
The device generates a clock that is frequency modulated in
order to increase the bandwidth that it occupies. By increasing
the bandwidth of the fundamental and its harmonics, the ampli-
tudes of the radiated electromagnetic emissions are reduced.
This effect is depicted in Figure 3.
As shown in Figure 3, a harmonic of a modulated clock has a
much lower amplitude than that of an unmodulated signal. The
reduction in amplitude is dependent on the harmonic number
and the frequency deviation or spread. The equation for the
reduction is
dB = 6.5 + 9*log10(P) + 9*log10(F)
Where P is the percentage of deviation and F is the frequency
in MHz where the reduction is measured.
The output clock is modulated with a waveform depicted in
Figure 4. This waveform, as discussed in “Spread Spectrum
Clock Generation for the Reduction of Radiated Emissions” by
Bush, Fessler, and Hardin produces the maximum reduction
in the amplitude of radiated electromagnetic emissions. The
deviation selected for this chip is specified in Table 7. Figure 4
details the Cypress spreading pattern. Cypress does offer
options with more spread and greater EMI reduction. Contact
your local Sales representative for details on these devices.
Spread Spectrum clocking is activated or deactivated by
selecting the appropriate values for bits 1–0 in data byte 0 of
the I²C data stream. Refer to Table 7 for more details.
5dB/div
SSFTG
Typical Clock
-S- S% ^{Frequency Span (MHz)} +SS%
Figure 3. Clock Harmonic with and without SSCG
Modulation Frequency Domain Representation
MAX (+0.5%)
MIN (–0.5%)
Figure 4. Typical Modulation Profile
Document #: 38-07153 Rev. *B
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