CYF0018V_13 Datasheet, PDF (23/36 Pages) Cypress Semiconductor – 18/36/72-Mbit Programmable FIFOs

CYF0018V
CYF0036V
CYF0072V
Switching Waveforms (continued)
Figure 14. Configuration Register Write
WCLK
WEN
LD
D[35:0]
t_ENS
config-reg 0
t_DS
t_DH
config-reg 1
config-reg 2
config-reg 3
config-reg 4
config-reg 5
WCLK
/RCLK
REN
LD
Q[35:0]
Figure 15. Configuration Register Read
L_{REN_TO_CONFIG}
Figure 16. Empty Flag Deassertion
t_A
Reg - 1
WCLK
WEN / IE
D_[35:0]
EF
D0
D1
RCLK
L _{EF_DEASSERT}
t_REF
REN
Document Number: 001-53687 Rev. *M
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