CY7C9536B Datasheet, PDF (16/46 Pages) Cypress Semiconductor – OC-48/STM-16 Framer with VC - POSIC2GVC™

CONFIDENTIAL
CY7C9536B
Pin Description (continued)
Signal Name
TDAT[31:0]
I/O Pad Type
I
TPRTY
I LVTTL
TADD[3:0]
I LVTTL
Pins JTAG
Pin Description
32 N
POS:
Transmit Packet Data Bus (TDAT) bus.
This bus carries the packet octets that are written to the selected
transmit FIFO and the in-band port address to select the desired
transmit FIFO. The TDAT bus is considered valid only when TENB is
simultaneously asserted.
Data is transmitted in big endian order on TDAT[31:0]. Given the
defined data structure, bit 31 is transmitted first and bit 0 is transmitted
last.
ATM:
Transmit Data Bus (TxData) bus.
This data bus carries the ATM cell.
Data on this bus is valid only if TxEnb* is HIGH. TxData[31:0] is
three-stated if TxEnb* is LOW.
TxData[31:0] is updated on the rising edge of TxClk.
HBST:
Transmit Data Bus (TDATA) bus.
32-bit Data bus. The data is valid when TDVAL_n signal is active.
1N
POS:
Transmit bus parity (TPRTY) signal.
The transmit parity (TPRTY) signal indicates the parity calculated over
the TDAT bus. TPRTY is considered valid only when TENB is
asserted.
TPRTY is supported for both even and odd parity.
ATM:
Transmit bus parity (TxPrty).
This signal indicates the parity on the TxData bus. A parity error is
indicated by a status bit and a maskable interrupt.
TxPrty is considered valid only when TxEnb* is simultaneously
asserted. TxPrty is sampled on the rising edge of TxClk.
HBST:
Transmit bus parity (TPARITY) signal.
Even/Odd parity calculated on the data bus alone or on all the bus
signals (TDATA, TADDR, TDVAL_n, TBVAL, TSOP, TEOP, and
TERR).
4N
POS:
Transmit address bus (PTADR) bus.
Address driven by Link layer to poll and select the appropriate
POSIC2GVC channel (port). The value for the Transmit and Receive
portions of a channel should be identical. Address 31 indicates a null
port.
ATM:
Transmit address bus (TxAddr) bus.
Address of POSIC2GVC channel being selected.
HBST:
Port Address (TADDR) bus.
Address driven by the Link Layer to indicate the port address of current
data transfer.
Document #: 38-02078 Rev. *G
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