IBIS4-1300_09 Datasheet, PDF (15/37 Pages) Cypress Semiconductor – 1.3 MPxl Rolling Shutter CMOS Image Sensor

IBIS4-1300
Output amplifier gain control
Figure 9. output amplifier DC gain
20,00
18,00
16,00
y=1.074*2^0.246*x
14,00
12,00
10,00
8,00
6,00
4,00
2,00
0,00
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
gain setting
Table 5. DC gain of output amplifier for different gain settings
gain setting DC gain (<1MHz) gain setting DC gain (<1MHz)
0000
1.28
1000
5.33
0001
1.51
1001
6.37
0010
1.82
1010
7.41
0011
2.13
1011
8.91
0100
2.60
1100
10.70
0101
3.11
1101
12.65
0110
3.71
1110
15.01
0111
4.40
1111
17.53
The output amplifier gain is controlled by a 4-bit word. In
principle, the output amplifier can be configured in unity
feedback mode by a permanent high signal on UNITYGAIN,
but the purpose of this mode is purely diagnostic. The "normal"
gain settings vary on an exponential scale. Figure 9. and Table
5. report all gain settings.
In first approximation, the gain setting is independent of
bandwidth, as the amplifier is a 2-stage design. The first stage
sets the gain, and the second stage is a unity gain buffer, that
determines bandwidth and slew rate. There is however some
influence of gain setting on bandwidth. Figure 10. shows the
output amplifier bandwidth for all gain settings.
Document Number: 38-05707 Rev. *B
Page 15 of 37