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CY7C64613 Datasheet, PDF (14/42 Pages) Cypress Semiconductor – EZ-USB FX USB Microcontroller
CY7C64613
3.2 General Notes About the Pin Description Table
1. See the EZ-USB FX TRM: For multiplexed pins, consult the EZ-USB FX TRM (primarily Chapter 4) for details of setting the
configuration registers.
2. Multiple Routed Signals: In some cases, an internal signal can be routed to more than one pin. For example, in the 80 and
128-pin packages RDY4 can be routed to any combination of (neither, either or both) pins 15 and 26.
3. Tie Up Unused Inputs: It is important that the recommendations in the Pin Description Table be followed, especially for inputs.
Unused CMOS inputs can oscillate if they are left open (floating), which can cause higher power usage and decreased
reliability.
4. Tie Up Certain Outputs That Are Initially Inputs: Many alternate functions of the FX multiplexed pins are similar to the WR#
alternate functions (see the PC6 / WR# / CTL4 pin below) in the following respect:
If WR# is chosen as the function of PC6, it should be pulled up to VCC through a pull-up resistor. This is to ensure that
WR# is inactive (pulled HIGH) at power-up, since, before the 8051 can configure this pin to WR#, it defaults to ‘PC6 an input’
(not driven by the FX pin).
All multiplexed pins that you use should be carefully considered in your circuit design for the effects of the transition through
their default configuration at power-up. These are typically (though not always) active LOW signals such as WR#.
The critical time interval to be considered is between RESET# deasserted and the pin driven as an output (immediately after
the 8051 code has initialized the port to be an alternate function that it is an output).
3.3 CY7C64613 Pin Descriptions
128 80
18 5
52
Name
5 AVCC
21 8 8 AGND
48 28 18 DISCON#
65 38
66 39
105
106
107
108
114
115
116
117
118
120
121
122
127
128
1
2
24 USBD–
25 USBD+
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
Type
Power
Power
O/Z
I/O/Z
I/O/Z
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Default
Description
N/A Analog VCC. This signal provides power to the analog section of the
chip.
N/A Analog Ground. Connect to ground with as short a path as possible.
H Disconnect. This pin can drive HIGH, LOW, or float. DISCON# pin
floats when the register bit USBCS.2 is LOW, and drives when it is
HIGH. The drive level of the DISCON# pin is the invert of register bit
USBCS.3. The DISCON# pin is normally connected to the USB D+ line
through a 1500Ω resistor. The CY7C64613 signals a USB connection
by setting USBCS.3=0 (drive 3.3V) and USBCS.2=1 (output enable).
The CY7C64613 signals a USB disconnect by setting USBCS.2=0
which floats the pin and disconnects the 1500Ω resistor from D+.
Z USB D– Connect to the USB D– signal through a 22 ±5% ohm resistor.
Z USB D+ Connect to the USB D+ signal through a 22 ±5% ohm resistor.
L 8051 Address Bus. This bus is driven at all times. When the 8051 is
L
addressing internal RAM it reflects the internal address. During DMA
transfers that use the RD# and WR# strobes, the address bus contains
L the incrementing DMA source or destination address for data trans-
L ferred over D[7.0].
L
L
L
L
L
L
L
L
L
L
L
L
Document #: 38-08005 Rev. *B
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