MB9B560R Datasheet, PDF (131/169 Pages) SPANSION – This document states the current technical specifications regarding

MB9B560R Series
When Using High-speed Synchronous Serial Chip Select (SPI = 1, SCINV = 1, MS=0, CSLVL=0)
(V_CC = 2.7V to 5.5V, V_SS = 0V)
Parameter
Symbol Conditions
V_CC < 4.5 V
Min
Max
V_CC ≥ 4.5 V
Min
Max
Unit
SCS↑→SCK↑setup time
SCK↓→SCS↓ hold time
t_CSSI
(*1)-20
Internal shift
t_CSHI
clock
(*2)+0
(*1)+0
(*2)+20
(*1)-20
(*2)+0
(*1)+0
ns
(*2)+20
ns
SCS deselect time
t_CSDI
operation
(*3)-20
+5t_CYCP
(*3)+20
+5t_CYCP
(*3)-20
+5t_CYCP
(*3)+20
+5t_CYCP
ns
SCS↑→SCK↑setup time
t_CSSE
3t_CYCP+15
-
3t_CYCP+15
-
ns
SCK↓→SCS↓ hold time
t_CSHE
External shift ⁰
-
0
-
ns
SCS deselect time
t_CSDE
clock
3t_CYCP+15
-
3t_CYCP+15
-
ns
SCS↑→SOT delay time
t_DSE
operation
-
25
-
25
ns
SCS↓→SOT delay time
t_DEE
0
-
0
-
ns
(*1): CSSU bit value×serial chip select timing operating clock cycle [ns]
(*2): CSHD bit value×serial chip select timing operating clock cycle [ns]
(*3): CSDS bit value×serial chip select timing operating clock cycle [ns]
Notes:
• t_CYCP indicates the APB bus clock cycle time.
About the APB bus number which UART is connected to, see 8. Block Diagram in this data sheet.
• About CSSU, CSHD, CSDS, serial chip select timing operating clock, see FM4 Family Peripheral Manual Main part
(MN709-00001).
• When the external load capacitance C_L = 30 pF.
Document Number: 002-04864 Rev.*A
Page 131 of 169