W209C Datasheet, PDF (13/16 Pages) SpectraLinear Inc – Frequency Generator for Integrated Core Logic with 133MHz FSB

PRELIMINARY
W209C
Group Skew and Jitter Limits
Output Group
CPU
SDRAM
APIC
48MHz
3V66
PCI
REF
Pin-Pin Skew Max.
175 ps
250 ps
250 ps
250 ps
175 ps
500 ps
N/A
Cycle-Cycle Jitter
250 ps
250 ps
500 ps
500 ps
500 ps
500 ps
1000 ps
Duty Cycle
45/55
45/55
45/55
45/55
45/55
45/55
45/55
Nom Vdd
2.5V
3.3V
2.5V
3.3V
3.3V
3.3V
3.3V
Skew, Jitter
Measure
Point
1.25V
1.5V
1.25V
1.5V
1.5V
1.5V
1.5V
Typical Output
Impedance
21 Ω
14 Ω
16 Ω
21 Ω
14 Ω
14 Ω
11 Ω
Output
Buffer
Test Point
Clock Output Wave
2.0
1.25
2.5V Clocking
Interface
0.4
T_HIGH
Test Load
T_PERIOD
Duty Cycle
T_RISE
T_FALL
T_LOW
T_HIGH
T_PERIOD
Duty Cycle
2.4
3.3V Clocking ^1.5
Interface ^0.4
T_RISE
T_FALL
T_LOW
Figure 8. Output Buffer
Ordering Information
Ordering Code
W209C
Package Name
Package Type
H
48-pin SSOP (300 mils)
Intel is a registered trademark of Intel Corporation.
Document #: 38-07171 Rev. *A
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