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CY7C43646 Datasheet, PDF (13/39 Pages) Cypress Semiconductor – 1K/4K/16K x36/x18/x2 Tri Bus FIFO
CY7C43646
CY7C43666
CY7C43686
Table 1. Flag Programming[2]
SPM
H
H
H
H
H
H
H
L
L
L
L
FS1/SEN
H
H
H
H
L
L
L
H
H
L
L
FS0/SD
H
H
L
L
H
H
L
L
H
H
L
MRS1
↑
X
↑
X
↑
X
↑
↑
↑
↑
↑
MRS2
X
↑
X
↑
X
↑
↑
↑
↑
↑
↑
X1 and Y1 Registers[3]
64
X
16
X
8
X
Parallel programming via Port A
Serial programming via SD
Reserved
Reserved
Reserved
X2 and Y2 Registers[4]
X
64
X
16
X
8
Parallel programming via Port A
Serial programming via SD
Reserved
Reserved
Reserved
Table 2. Port A Enable Function Table
CSA
H
L
L
L
L
L
L
L
W/RA
X
H
H
H
L
L
L
L
ENA
X
L
H
H
L
H
L
H
MBA
X
X
L
H
L
L
H
H
CLKA
X
X
↑
↑
X
↑
X
↑
A0–35 OUTPUTS
In high-impedance state
In high-impedance state
In high-impedance state
In high-impedance state
Active, FIFO2 output register
Active, FIFO2 output register
Active, Mail2 register
Active, Mail2 register
PORT FUNCTION
None
None
FIFO1 write
Mail1 write
None
FIFO2 read
None
Mail2 read (set MBF2 HIGH)
Table 3. Port B Enable Function Table
CSB
H
L
L
L
L
RENB
X
L
H
L
H
MBB
X
L
L
H
H
CLKB
X
X
↑
X
↑
B0–17 OUTPUTS
In high-impedance state
Active, FIFO1 output register
Active, FIFO1 output register
Active, Mail1 register
Active, Mail1 register
PORT FUNCTION
None
None
FIFO1 read
None
Mail1 read (set MBF1 HIGH)
Table 4. Port C Enable Function Table
WENC
H
MBC
L
CLKC
↑
C0–17 INPUTS
In high-impedance state
H
H
↑
In high-impedance state
L
L
X
In high-impedance state
L
H
X
Active, Mail1 register
Notes:
3. X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
4. X2 register holds the offset for AEA; Y2 register holds the offset for AFC.
PORT FUNCTION
FIFO2 write
Mail2 write
None
None
Document #: 38-06023 Rev. *C
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