W320-03_05 Datasheet, PDF (12/18 Pages) Cypress Semiconductor – 200-MHz Spread Spectrum Clock Synthesizer/Driver

PWRDWN# Deassertion^[15]
66BUFF1/GMCH
66BUFF0,2
PCI
PCI_F (APIC)
PWR_DWN#
CPU
CPU#
3V66
66IN
USB
REF
<3ms
10-30 µs min.
100-200 µs max.
W320-03
PWRGD# Timing Diagrams
GND VRM 5/12V
PWRGD#
VID [3:0]
BSEL [1:0]
PWRGD# FROM
VRM
PWRGD# FROM
NPN
VCC CPU CORE
PWRGD#
VCC W320 CLOCK
GEN
CLOCK STATE
CLOCK VCO
CLOCK OUTPUTS
Possible glitch while Clock VCC is coming
up. Will be gone in 0.2–0.3 ms delay.
State 0
OFF
0.2 – 0.3 ms Wait for _Sample
delay _{PWRGD# BSELS}
State 1 State 2 State 3
ON
OFF
ON
Figure 2. CPU Power BEFORE Clock Power
Document #: 38-07248 Rev. *C
Page 12 of 18