CYP15G0101DXA Datasheet, PDF (1/40 Pages) Cypress Semiconductor – Single Channel HOTLink II Transceiver

PRELIMINARY
CYP15G0101DXA
Single Channel HOTLink II™ Transceiver
Features
• 2^nd generation HOTLink^® technology
• Fibre Channel and Gigabit Ethernet compliant 8B/10B-
coded or 10-bit unencoded
• ESCON, DVB-ASI Compliant
• SMPTE-292M, SMPTE-259M Compliant
• 8-bit encoded data transport
— Aggregate throughput of 2.4 GBits/second
• 10-bit unencoded data transport
— Aggregate throughput of 3 GBits/second
• Selectable parity check/generate
• Selectable input clocking options
• Selectable output clocking options
• MultiFrame™ receive Framer provides alignment to
— Bit and byte boundaries
— Comma or Full K28.5 detect
— Single or Multi-byte Framer for byte alignment
— Low-latency option
• Synchronous LVTTL parallel input interface
• Synchronous LVTTL parallel output interface
• 200-to-1500 MBaud serial signaling rate
• Internal PLLs with no external PLL components
• Dual differential LVPECL-compatible serial inputs
— Internal DC-restoration
• Dual differential LVPECL-compatible serial outputs
— Source matched for 50Ω transmission lines
— No external bias resistors required
— Signaling-rate controlled edge-rates
• Compatible with
— Fiber-optic modules
— Copper cables
— Circuit board traces
• JTAG boundary scan
• Built-In Self-Test (BIST) for at-speed link testing
• Link Quality Indicator
— Analog signal detect
— Digital signal detect
— Frequency range detect
• Low Power (0.85W typical)
— Single +3.3V V_CC supply
• 100-ball BGA
• 0.25µ BiCMOS technology
Functional Description
The CYP15G0101DXA Single Channel HOTLink II™ Trans-
ceiver is a point-to-point communications building block allow-
ing the transfer of data over a high-speed serial link (optical
fiber, balanced, and unbalanced copper transmission lines) at
signaling speeds ranging from 200-to-1500 MBaud.
The transmit channel accepts parallel characters in an Input
Register, encodes each character for transport, and converts
it to serial data. The receive channel accepts serial data and
converts it to parallel data, decodes the data into characters,
and presents these characters to an Output Register. Figure 1
illustrates typical connections between independent host sys-
tems and corresponding CYP15G0101DXA parts. As a sec-
ond-generation HOTLink device, the CYP15G0101DXA ex-
tends the HOTLink II family with enhanced levels of integration
and faster data rates, while maintaining serial-link compatibility
(data, command, and BIST) with other HOTLink devices.
The transmit (TX) section of the CYP15G0101DXA Single
Channel HOTLink II consists of a byte-wide channel. The
channel can accept either 8-bit data characters or pre-encod-
10
10
10
Serial Link
10
Backplane or
Cabled
Connections
Figure 1. HOTLink II™ System Connections
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-02061 Rev. **
Revised April 25, 2002