CY8CLED16P01 Datasheet, PDF (1/58 Pages) Cypress Semiconductor – Powerline Communication Solution Integrated Powerline Modem PHY

CY8CLED16P01
Powerline Communication Solution
Features
■ Powerline Communication Solution
❐ Integrated Powerline Modem PHY
❐ Frequency Shift Keying Modulation
❐ Configurable baud rates up to 2400 bps
❐ Powerline Optimized Network Protocol
❐ Integrates Data Link, Transport, and Network Layers
❐ Supports Bidirectional Half Duplex Communication
❐ 8-bit CRC Error Detection to Minimize Data Loss
❐ I²C enabled Powerline Application Layer
❐ Supports I²C Frequencies of 50, 100, and 400 kHz
❐ Reference Designs for 110V/240V AC and 12V/24V AC/DC
Powerlines
❐ Reference Designs comply with CENELEC EN
50065-1:2001 and FCC Part 15
■ HB LED Controller
❐ Configurable Dimmers Support up to 16 Independent LED
Channels
❐ 8 to 32 Bits of Resolution per Channel
❐ PrISM™ Modulation technology to reduce radiated EMI and
Low Frequency Blinking
❐ Additional communication interfaces for lighting control such
as DALI, DMX512 etc.
■ Powerful Harvard Architecture Processor
❐ M8C Processor Speeds to 24 MHz
❐ Two 8x8 Multiply, 32-Bit Accumulate
■ Programmable System Resources (PSoC^® Blocks)
❐ 12 Rail-to-Rail Analog PSoC Blocks provide:
• Up to 14-Bit ADCs
• Up to 9-Bit DACs
• Programmable Gain Amplifiers
• Programmable Filters and Comparators
❐ 16 Digital PSoC Blocks provide:
• 8 to 32-Bit Timers, Counters, and PWMs
• CRC and PRS Modules
• Up to Four Full Duplex UARTs
• Multiple SPI^TM Masters or Slaves
• Connectable to all GPIO Pins
❐ Complex Peripherals by Combining Blocks
■ Flexible On-Chip Memory
❐ 32 KB Flash Program Storage 50,000 Erase or Write Cycles
❐ 2 KB SRAM Data Storage
❐ EEPROM Emulation in Flash
■ Programmable Pin Configurations
❐ 25 mA Sink, 10 mA Source on all GPIOs
❐ Pull Up, Pull Down, High Z, Strong, or Open-drain Drive
Modes on all GPIOs
❐ Up to 12 Analog Inputs on GPIO
❐ Configurable Interrupt on all GPIO
■ Additional System Resources
❐ I²C Slave, Master, and Multi-Master to 400 kHz
❐ Watchdog and Sleep Timers
❐ User-Configurable Low Voltage Detection
❐ Integrated Supervisory Circuit
❐ On-Chip Precision Voltage Reference
■ Complete Development Tools
❐ Free Development Software (PSoC Designer™)
❐ Full Featured In-Circuit Emulator (ICE) and Programmer
❐ Full Speed Emulation
❐ Complex Breakpoint Structure
❐ 128 KB Trace Memory
❐ Complex Events
❐ C Compilers, Assembler, and Link
Logic Block Diagram
Powerline Communication Solution
Powerline
Network Protocol
Physical Layer
FSK Modem
PLC Core
Embedded Application
Programmable
System Resources
Digital and Analog
Peripherals
Additional System
Resources
MAC, Decimator, I2C,
SPI, UART etc.
PSoC Core
Modulation
Technology
PrISM, PWM etc.
Additional
Communication
Interface
DALI, DMX512
HB LED
Controller
Powerline Transceiver Packet
AC/DC Powerline Coupling Circuit
(110V/240V AC, 12V/24V AC/DC etc.)
Powerline
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-49263 Rev. *J
• San Jose, CA 95134-1709 • 408-943-2600
Revised June 17, 2011