SM3 Datasheet, PDF (28/36 Pages) Connor-Winfield Corporation – ULTRA MINIATURE STRATUM 3 MODULE

Application Notes continued
Holdover History Accumulation and Maintenance continued – Whenever holdover is entered, it is the Active Holdover History that
is used to determine the holdover frequency. The History_Cmd register allows the application to issue three holdover history control
commands:
1) Save the Active Holdover History to the Backup History.
2) Restore a Backup History to the Active.
3) Flush the active History as well as the accumulation register. The Backup history remains intact.
Both the Active and the Backup holdover histories are loaded with the calibrated freerun synthesizer control data on reset/power-up.
The application might use the “save to backup” in a situation where, for example, the primary reference is known to be of higher
quality than any secondary references, in which case it may be desirable to save and then restore the holdover history accumulated on
the primary reference if the primary reference is lost and holdover is entered upon loss of a secondary reference. Users can restore the
history from backup any time, even while operating in Holdover mode. The frequency transient will be smooth and continuous. It is the
responsibility of application software to keep track of the age and viability of the holdover backup history. Given time and temperature
effects on oscillator aging, the application may wish to periodically perform a “Save” of the Active history to keep the backup current.
When switching to a new reference, the active holdover history will remain intact and marked as “Holdover Available” (if it was
available before the reference switch) until a new history is accumulated on the new reference (Typically 15 minutes after lock has been
achieved). During the new history accumulation, the “Holdover Build Complete” bit is reset. Once the new history accumulation is
complete, it is transferred to the Active History and the “Holdover Build Complete” bit is set. The active history will then continue to be
updated to track the reference.
The History_Policy register allows the application to control how a new history is built. When set to “Rebuild”:
1) History accumulation begins when lock is achieved on the new reference.
2) The holdover history is rebuilt (taking about 15 minutes). The Active History remains untouched until it is replaced when the build is
complete.
When the policy is set to “Continue”:
1) If there is no “Available” Active History, a new build occurs, as under the “Rebuild” policy.
2) If there is an “Available” Active History, it will continue, the accumulation register will be loaded from the
Active History, and the “Build” process is essentially completed immediately following lock on the new reference.
The “Continue” policy may be used by the application if, for example, it is known that the reference switched to may be traced to the
same source and therefore likely has no frequency offset from the prior reference. In that case, the “Continue” policy avoids the delay of
rebuilding the holdover history. If the switch is likely to be between references with known or unknown frequency offset, then it is
preferable to use the “Rebuild” policy.
The time since the holdover state was entered may be read from the Holdover_Time register. Values are from 0 to 255 hours, limited
at 255, and reset to 0 when not in the holdover state.
Boundary Scan IEEE1149.1-2001 (Limited Testability Support) - This module exposes a boundary scan chain which contains one
or more boundary scan testable IEEE1149.1-2001 complaint devices. The exposed boundary scan chain is IEEE1149.1-2001
compliant, and supports all documented testing modes of devices contained within chain. Integration of this module into an existing
boundary scan chain will require the following.
- Substitution of modules footprint with provided testability model schematic.
- Modified net list will need to be loaded into boundary scan test vector generation software.
Testability Model Schematic and BSDL file(s) can be obtained directly from factory.
Control Modes
The device must in turn be operated in a manual or automatic control mode.
Reset may be pulled low for a minimum of 10mS after SM3 start-up (or any other desired time) to initialize the full device state.
The BITS clock output frequency is selected by the T1/E1 pin. When T1/E1 = 1, the BITS frequency is 1.544 MHz, and when T1/E1 = 0,
the BITS frequency is 2.048 MHz.
MASTER SELECT - Determines the master or slave mode. Set to “1” for a master, and “0” for a slave. Master/slave switches should
be performed with minimal delay between switching the states of each of the two devices. This can be easily accomplished, for example,
by controlling the master/slave state with a single signal, coupled to one of the devices through an inverter.
For simplex operation, the device should be in Master mode - set MASTER SELECT to “1”.
Data Sheet #: TM052 Page 28 of 36 Rev: 03 Date: 11/07/08
© Copyright 2008 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice