FX629 Datasheet, PDF (9/10 Pages) CML Microcircuits – Delta Modulation Codec

Specifications ......
Process Information
The following Table gives details of the process and test controls employed in the manufacture of the FX629
'Mil Std' Delta Codec.
Function
Reference
Remarks
Hermeticity
Fine Leak Test –
Coarse Leak Test –
Mil Std 883C
Mil Std 883C
using Method 1014 – test condition A1.
using Method 1014 – test condition C.
Burnin
Mil Std 883C
using Method 1015 – test condition E.
168 Hours @ 85°C with 5v power, and clocks applied.
Temperature Cycling
Mil Std 883C
using Method 1010 – test condition B.
10 cycles -55°C to +125°C.
The following mechanical assembly tests are Qualified to BS9450
Vibration
Shock
Low Pressure
Transport and Storage –
Operation –
Humidity
BS9450
BS9450
BS9450
BS9450
Section 1.2.6.8.1
55Hz to 500Hz at 98 m/sec acceleration.
Section 1.2.6.6
981 m/sec for 6 msec.
Section 1.2.6.12
225mmHg (altitude 9000m).
600mmHg (altitude 2400m).
Section 1.2.6.4
96 Hours @ 45°C, 95% relative humidity plus condensed
water.
Notes:
1. Dynamic characteristics are specified at 5V unless otherwise specified.
2. All logic inputs except, Encoder and Decoder Data Clocks.
3. For an Encoder/Decoder combination, insertion loss contributed by a single component is half this
figure.
4. Driven with a source impedance of <100Ω.
5. Recommended values – See Figures 5, 6, 7 and 8.
6 Group Delay Distortion for the full codec is relative to the delay with 820Hz, -20dB at the encoder input.
7. An Emitter Follower output stage.
8. 4.0V = 80% V_DD, 3.5V = 70% V_DD, 1.5V = 30% V_DD, 1.0V = 20% V_DD.
9. Analogue Voltage Levels used in this Data Sheet: 0dBm0 = 489mVrms = - 4dBm = 0dB.
-15dBm0 = 87mVrms. - 20dBm0 = 49mVrms = - 24dBm.
Application Recommendations
Due to the very low levels of signal and idle channel noise required in Military applications – a noisy or badly
regulated power supply could cause instability putting the overall system performance out of specification.
Adherence to the points noted below will assist in minimizing this problem.
(a) Care should be taken on the design and layout of
the printed circuit board.
(b) All external components (as recommended in
Figure 3) should be kept close to the package.
(e) Inputs and outputs should be screened wherever
possible.
(f) A "ground plane" connected to V_SS will assist in
eliminating external pick-up on the input and output
pins.
(c) Tracks should be kept short, particularly the
Encoder Input capacitor and the V_BIAS capacitor.
(d) Xtal/clock tracks should be kept well away from
analogue inputs and outputs.
(g) It is recommended that the power supply rails
have less than 1mVrms of noise allowed.
(h) The source impedance to the Encoder Input pin
must be less than 100Ω, Output Idle channel noise
levels will improve with even lower source impedances.
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