FX919B Datasheet, PDF (28/47 Pages) CML Microcircuits – Excellent Radio Fading Performance

4-Level FSK Modem Data Pump
FX919B
The Data Quality readings are only valid when the modem has successfully acquired signal level and timing
lock for at least 64 symbol times. It is invalid when an AQSC or AQLEV sequence is being performed or when
the LEVRES setting is 'Lossy Peak Detect'. A low reading will be obtained if the PLLBW bits are set to 'Wide' or
if the received signal waveform is distorted in any significant way.
Section 1.6.6 describes how monitoring the Data Quality reading can help improve the overall system
performance in some applications.
1.5.6 CRC, FEC and Interleaving
Cyclic Redundancy Codes
CRC1
This is a sixteen-bit CRC check code contained in bytes 10 and 11 of the Header Block. It is calculated by the
modem from the first 80 bits of the block ( Bytes 0 to 9 inclusive) using the generator polynomial:
x16 + x12 + x5 + 1
CRC2
This is a thirty-two-bit CRC check code contained in bytes 8 to 11 of the 'Last' Block. It is calculated by the
modem from all of the data and pad bytes in the Intermediate Blocks and in the first 8 bytes of the Last Block
using the generator polynomial:
x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x1 + 1
Notes:
In receive mode the CRC2 checksum circuits are initialised on completion of any task other than NULL
or RILB. In transmit mode the CRC2 checksum circuits are initialised on completion of any task other
than NULL, TIB or TLB.
Command Register bit B5 (CRC) allows the user to select between two different forms of the CRC1
and CRC2 checksums. When this bit is set to '0' the CRC generators are initialised to 'all ones' as for
CCITT X25 CRC calculations. When this bit is set to '1' the CRC generators are initialised to 'all zeros'.
Forward Error Correction
In transmit mode, the FX919B uses a Trellis Encoder to translate the 96 bits (12 bytes) of a 'Header',
'Intermediate' or 'Last' Block into a 66-symbol sequence which includes FEC information.
In receive mode, the FX919B decodes the received 66 symbols of a block into 96 bits of binary data using a
'Soft Decision' Viterbi algorithm to perform decoding and error correction.
Interleaving
The 66 symbols of a 'Header', 'Intermediate' or 'Last' block are interleaved by the modem before transmission
to give protection against the effects of noise bursts and short fades.
In receive mode, the FX919B de-interleaves the received symbols prior to decoding.
© 1997 Consumer Microcircuits Limited
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D/919B/1