FX919B Datasheet, PDF (18/47 Pages) CML Microcircuits – Excellent Radio Fading Performance

4-Level FSK Modem Data Pump
FX919B
If an 'Intermediate' block is received then the µC should read out all 12 bytes from the Data Block Buffer and
ignore the CRCERR bit of the Status Register, for a 'Last' block the µC need only read the first 8 bytes from the
Data Block Buffer, and the CRCERR bit in the Status Register will reflect the validity of the received CRC2
checksum.
SFS: Search for Frame Sync
This task causes the modem to search the received signal for a 24-symbol sequence which matches the Frame
Synchronisation pattern to within the tolerance defined by the FSTOL bits of the Mode Register.
When a match is found the modem will set the BFREE and IRQ bits of the Status Register to '1' to indicate to
the µC that it should write the next task to the Command Register.
R4S: Read 4 Symbols
This task causes the modem to read the next 4 symbols and translate them directly (without de-interleaving or
FEC) to an 8-bit byte which is placed into the Data Block Buffer. The BFREE and IRQ bits of the Status
Register will then be set to '1' to indicate that the µC may read the data byte from the Data Block Buffer and
write the next task to the Command Register.
This task is intended for special tests and channel monitoring - perhaps preceded by SFS task.
Note that although it is possible to construct message formats which do not rely on the block formatting of the
THB, TIB and TLB tasks by using T4S or T24S tasks to transmit and R4S to receive the user’s data, anyone
attempting this should be aware that the receive level and timing measurement circuits need to see a
reasonably ‘random’ distribution of all four possible symbols in the received signal to operate correctly, and
should therefore ‘scramble’ the binary data before transmission.
T24S: Transmit 24 Symbols
This task, which is intended to facilitate the transmission of Symbol and Frame Sync patterns as well as special
test sequences, takes 6 bytes of data from the Data Block Buffer and transmits them as 24 4-level symbols
without any CRC or FEC.
Byte 0 of the Data Block Buffer is sent first, byte 5 last.
Once the modem has read the data bytes from the Data Block Buffer, the BFREE and IRQ bits of the Status
Register will be set to '1', indicating to the µC that it may write the data and command byte for the next task to
the modem.
The tables below show what data has to be written to the Data Block Buffer to transmit the FX919B Symbol and
Frame Sync sequences:
'Symbol Sync'
Symbols
+3 +3 -3 -3
+3 +3 -3 -3
+3 +3 -3 -3
+3 +3 -3 -3
+3 +3 -3 -3
+3 +3 -3 -3
Values written to Data Block Buffer
Binary
Hex
Byte 0:
11110101
F5
Byte 1:
11110101
F5
Byte 2:
11110101
F5
Byte 3:
11110101
F5
Byte 4:
11110101
F5
Byte 5:
11110101
F5
© 1997 Consumer Microcircuits Limited
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D/919B/1