FX929B Datasheet, PDF (25/48 Pages) CML Microcircuits – Flexible Operating Modes

4-Level FSK Modem Data Pump
FX929B
Figure 13 Ideal 'RXEYE' Signal
Mode Register B3: PSAVE - Powersave
When this bit is a '1', the modem will be in a 'powersave' mode in which the internal filters, the Rx Symbol and
Clock extraction circuits and the Tx o/p buffer will be disabled, and the TxOp pin will be connected to Vbias
through a high value resistance. The Xtal Clock oscillator, Rx i/p amplifier and the µC interface logic will
continue to operate.
Setting the PSAVE bit to '0' restores power to all of the chip circuitry. Note that the internal filters - and hence
the TxOp pin in transmit mode - will take about 20 symbol-times to settle after the PSAVE bit is taken from '1'
to '0'.
Mode Register B2: SSIEN - 'S' Symbol IRQ Enable
In receive mode, setting this bit to '1' causes the IRQ bit of the status register to be set to '1' whenever a new
'S' symbol has been received. (The SRDY bit of the Status Register will also be set to '1' at the same time,
and the SVAL bits updated to reflect the received 'S' symbol.)
In transmit mode, setting this bit to '1' causes the IRQ bit of the Status Register to be set to '1' whenever a 'S'
symbol has been transmitted. (The SRDY bit of the Status Register will also be set to '1' at the same time.)
Mode Register B1, 0: SSYM - 'S' Symbol To Be Transmitted
In transmit mode these two bits define the next 'S' symbol to be transmitted. These bits have no effect in
receive mode.
1.5.5.5 Status Register
This register may be read by the µC to determine the current state of the modem.
© 1997 Consumer Microcircuits Limited
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D/929B/1