DB829 Datasheet, PDF (25/29 Pages) CML Microcircuits – Low Voltage Operation

Baseband Signal Processor
25
7.1.4 Timing
For the following conditions unless otherwise specified:
Xtal Frequency = 4.032MHz, V_DD = 5.0V, T_AMB = 25°C.
t_CSE
t_CSH
t_HIZ
t_CSOFF
t_NXT
t_CK
Parameter
"CS-Enable to Clock-High"
Last "Clock-High to CS-High"
"CS-High to Reply Output 3-state"
"CS-High" Time between transactions
"Inter-Byte" Time
"Clock-Cycle" time
Notes
Min.
2.0
4.0
2.0
4.0
2.0
MX829 PRELIMINARY INFORMATION
Typ.
Max.
2.0
Units
µs
µs
µs
µs
µs
µs
Timing Notes:
1. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the peripheral MSB (bit 7) first, LSB
(bit 0) last. REPLY DATA is read from the peripheral MSB (bit 7) first, LSB (bit 0) last.
2. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge.
3. Loaded commands are acted upon at the end of each command.
4. To allow for differing µController serial interface formats "C-BUS" compatible ICs are able to work with either polarity
SERIAL CLOCK pulses.
CS
t_CSE
SERIAL CLOCK
COMMAND DATA
76543210
MSB
LSB
ADDRESS/COMMAND
BYTE
REPLY DATA
Logic level is not important
t_CSOFF
t_NXT
t_NXT
t_CK
765432 10
FIRST DATA BYTE
765432 10
MSB
LSB
FIRST REPLY DATA BYTE
765432 10
LAST DATA BYTE
765432 10
LAST REPLY DATA BYTE
Figure 14: "C-BUS" Timing
t_CSH
t_HIZ
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